From 87360e3dd42bb627a9f2611f961728c0789e1c21 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 8 Jul 2015 14:44:21 +0200 Subject: dts: update to v4.2-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/arm/marvell,berlin.txt | 100 ++++++++---------------------------- 1 file changed, 22 insertions(+), 78 deletions(-) (limited to 'dts/Bindings/arm/marvell,berlin.txt') diff --git a/dts/Bindings/arm/marvell,berlin.txt b/dts/Bindings/arm/marvell,berlin.txt index a99eb9eb14..3bab18409b 100644 --- a/dts/Bindings/arm/marvell,berlin.txt +++ b/dts/Bindings/arm/marvell,berlin.txt @@ -1,6 +1,18 @@ Marvell Berlin SoC Family Device Tree Bindings --------------------------------------------------------------- +Work in progress statement: + +Device tree files and bindings applying to Marvell Berlin SoCs and boards are +considered "unstable". Any Marvell Berlin device tree binding may change at any +time. Be sure to use a device tree binary and a kernel image generated from the +same source tree. + +Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a +stable binding/ABI. + +--------------------------------------------------------------- + Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500 shall have the following properties: @@ -49,10 +61,9 @@ chip control registers, so there should be a single DT node only providing the different functions which are described below. Required properties: -- compatible: shall be one of - "marvell,berlin2-chip-ctrl" for BG2 - "marvell,berlin2cd-chip-ctrl" for BG2CD - "marvell,berlin2q-chip-ctrl" for BG2Q +- compatible: + * the first and second values must be: + "simple-mfd", "syscon" - reg: address and length of following register sets for BG2/BG2CD: chip control register set BG2Q: chip control register set and cpu pll registers @@ -63,90 +74,23 @@ Marvell Berlin SoCs have a system control register set providing several individual registers dealing with pinmux, padmux, and reset. Required properties: -- compatible: should be one of - "marvell,berlin2-system-ctrl" for BG2 - "marvell,berlin2cd-system-ctrl" for BG2CD - "marvell,berlin2q-system-ctrl" for BG2Q +- compatible: + * the first and second values must be: + "simple-mfd", "syscon" - reg: address and length of the system control register set -* Clock provider binding - -As clock related registers are spread among the chip control registers, the -chip control node also provides the clocks. Marvell Berlin2 (BG2, BG2CD, BG2Q) -SoCs share the same IP for PLLs and clocks, with some minor differences in -features and register layout. - -Required properties: -- #clock-cells: shall be set to 1 -- clocks: clock specifiers referencing the core clock input clocks -- clock-names: array of strings describing the input clock specifiers above. - Allowed clock-names for the reference clocks are - "refclk" for the SoCs osciallator input on all SoCs, - and SoC-specific input clocks for - BG2/BG2CD: "video_ext0" for the external video clock input - -Clocks provided by core clocks shall be referenced by a clock specifier -indexing one of the provided clocks. Refer to dt-bindings/clock/berlin.h -for the corresponding index mapping. - -* Pin controller binding - -Pin control registers are part of both register sets, chip control and system -control. The pins controlled are organized in groups, so no actual pin -information is needed. - -A pin-controller node should contain subnodes representing the pin group -configurations, one per function. Each subnode has the group name and the muxing -function used. - -Be aware the Marvell Berlin datasheets use the keyword 'mode' for what is called -a 'function' in the pin-controller subsystem. - -Required subnode-properties: -- groups: a list of strings describing the group names. -- function: a string describing the function used to mux the groups. - -* Reset controller binding - -A reset controller is part of the chip control registers set. The chip control -node also provides the reset. The register set is not at the same offset between -Berlin SoCs. - -Required property: -- #reset-cells: must be set to 2 - Example: chip: chip-control@ea0000 { - compatible = "marvell,berlin2-chip-ctrl"; - #clock-cells = <1>; - #reset-cells = <2>; + compatible = "simple-mfd", "syscon"; reg = <0xea0000 0x400>; - clocks = <&refclk>, <&externaldev 0>; - clock-names = "refclk", "video_ext0"; - spi1_pmux: spi1-pmux { - groups = "G0"; - function = "spi1"; - }; + /* sub-device nodes */ }; sysctrl: system-controller@d000 { - compatible = "marvell,berlin2-system-ctrl"; + compatible = "simple-mfd", "syscon"; reg = <0xd000 0x100>; - uart0_pmux: uart0-pmux { - groups = "GSM4"; - function = "uart0"; - }; - - uart1_pmux: uart1-pmux { - groups = "GSM5"; - function = "uart1"; - }; - - uart2_pmux: uart2-pmux { - groups = "GSM3"; - function = "uart2"; - }; + /* sub-device nodes */ }; -- cgit v1.2.3