From 574eed3f6fcf056aa4c9e46c4b5224e3f7844d8d Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 19 Dec 2019 05:46:54 +0100 Subject: dts: update to v5.5-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/arm/amlogic.yaml | 9 +- dts/Bindings/arm/amlogic/smp-sram.txt | 32 ---- dts/Bindings/arm/arm,scmi.txt | 2 +- dts/Bindings/arm/arm,scpi.txt | 2 +- dts/Bindings/arm/atmel-at91.yaml | 14 ++ dts/Bindings/arm/axentia.txt | 28 ---- dts/Bindings/arm/bcm/bcm2835.yaml | 54 ++++++ dts/Bindings/arm/bcm/brcm,bcm2835.txt | 67 -------- dts/Bindings/arm/coresight.txt | 9 + dts/Bindings/arm/cpus.yaml | 1 + dts/Bindings/arm/freescale/fsl,scu.txt | 16 +- dts/Bindings/arm/fsl.yaml | 58 ++++++- .../arm/marvell/ap806-system-controller.txt | 177 -------------------- .../arm/marvell/ap80x-system-controller.txt | 177 ++++++++++++++++++++ dts/Bindings/arm/marvell/armada-7k-8k.txt | 24 --- dts/Bindings/arm/marvell/armada-7k-8k.yaml | 61 +++++++ dts/Bindings/arm/mrvl/mrvl.txt | 14 -- dts/Bindings/arm/mrvl/mrvl.yaml | 35 ++++ dts/Bindings/arm/msm/qcom,llcc.txt | 41 ----- dts/Bindings/arm/msm/qcom,llcc.yaml | 55 +++++++ dts/Bindings/arm/omap/omap.txt | 30 ++-- dts/Bindings/arm/omap/prm-inst.txt | 29 ++++ dts/Bindings/arm/realtek.yaml | 27 ++- dts/Bindings/arm/renesas,prr.txt | 20 --- dts/Bindings/arm/renesas,prr.yaml | 35 ++++ dts/Bindings/arm/renesas.yaml | 20 +++ dts/Bindings/arm/rockchip.yaml | 19 ++- dts/Bindings/arm/samsung/exynos-chipid.txt | 12 -- dts/Bindings/arm/samsung/exynos-chipid.yaml | 39 +++++ dts/Bindings/arm/samsung/pmu.txt | 72 -------- dts/Bindings/arm/samsung/pmu.yaml | 105 ++++++++++++ dts/Bindings/arm/samsung/samsung-boards.txt | 83 ---------- dts/Bindings/arm/samsung/samsung-boards.yaml | 181 +++++++++++++++++++++ .../arm/samsung/samsung-secure-firmware.yaml | 31 ++++ dts/Bindings/arm/samsung/sysreg.txt | 19 --- dts/Bindings/arm/samsung/sysreg.yaml | 45 +++++ dts/Bindings/arm/sprd.txt | 14 -- dts/Bindings/arm/sprd.yaml | 33 ++++ dts/Bindings/arm/stm32/stm32.yaml | 27 ++- dts/Bindings/arm/sunxi.yaml | 5 + dts/Bindings/arm/sunxi/smp-sram.txt | 44 ----- dts/Bindings/arm/sunxi/sunxi-mbus.txt | 1 + 42 files changed, 1090 insertions(+), 677 deletions(-) delete mode 100644 dts/Bindings/arm/amlogic/smp-sram.txt delete mode 100644 dts/Bindings/arm/axentia.txt create mode 100644 dts/Bindings/arm/bcm/bcm2835.yaml delete mode 100644 dts/Bindings/arm/bcm/brcm,bcm2835.txt delete mode 100644 dts/Bindings/arm/marvell/ap806-system-controller.txt create mode 100644 dts/Bindings/arm/marvell/ap80x-system-controller.txt delete mode 100644 dts/Bindings/arm/marvell/armada-7k-8k.txt create mode 100644 dts/Bindings/arm/marvell/armada-7k-8k.yaml delete mode 100644 dts/Bindings/arm/mrvl/mrvl.txt create mode 100644 dts/Bindings/arm/mrvl/mrvl.yaml delete mode 100644 dts/Bindings/arm/msm/qcom,llcc.txt create mode 100644 dts/Bindings/arm/msm/qcom,llcc.yaml create mode 100644 dts/Bindings/arm/omap/prm-inst.txt delete mode 100644 dts/Bindings/arm/renesas,prr.txt create mode 100644 dts/Bindings/arm/renesas,prr.yaml delete mode 100644 dts/Bindings/arm/samsung/exynos-chipid.txt create mode 100644 dts/Bindings/arm/samsung/exynos-chipid.yaml delete mode 100644 dts/Bindings/arm/samsung/pmu.txt create mode 100644 dts/Bindings/arm/samsung/pmu.yaml delete mode 100644 dts/Bindings/arm/samsung/samsung-boards.txt create mode 100644 dts/Bindings/arm/samsung/samsung-boards.yaml create mode 100644 dts/Bindings/arm/samsung/samsung-secure-firmware.yaml delete mode 100644 dts/Bindings/arm/samsung/sysreg.txt create mode 100644 dts/Bindings/arm/samsung/sysreg.yaml delete mode 100644 dts/Bindings/arm/sprd.txt create mode 100644 dts/Bindings/arm/sprd.yaml delete mode 100644 dts/Bindings/arm/sunxi/smp-sram.txt (limited to 'dts/Bindings/arm') diff --git a/dts/Bindings/arm/amlogic.yaml b/dts/Bindings/arm/amlogic.yaml index 99015cef8b..c6a443352e 100644 --- a/dts/Bindings/arm/amlogic.yaml +++ b/dts/Bindings/arm/amlogic.yaml @@ -94,7 +94,7 @@ properties: - amlogic,p212 - hwacom,amazetv - khadas,vim - - libretech,cc + - libretech,aml-s905x-cc - nexbox,a95x - const: amlogic,s905x - const: amlogic,meson-gxl @@ -147,6 +147,7 @@ properties: - enum: - hardkernel,odroid-n2 - khadas,vim3 + - ugoos,am6 - const: amlogic,s922x - const: amlogic,g12b @@ -156,4 +157,10 @@ properties: - seirobotics,sei610 - khadas,vim3l - const: amlogic,sm1 + + - description: Boards with the Amlogic Meson A1 A113L SoC + items: + - enum: + - amlogic,ad401 + - const: amlogic,a1 ... diff --git a/dts/Bindings/arm/amlogic/smp-sram.txt b/dts/Bindings/arm/amlogic/smp-sram.txt deleted file mode 100644 index 3473ddaadf..0000000000 --- a/dts/Bindings/arm/amlogic/smp-sram.txt +++ /dev/null @@ -1,32 +0,0 @@ -Amlogic Meson8 and Meson8b SRAM for smp bringup: ------------------------------------------------- - -Amlogic's SMP-capable SoCs use part of the sram for the bringup of the cores. -Once the core gets powered up it executes the code that is residing at a -specific location. - -Therefore a reserved section sub-node has to be added to the mmio-sram -declaration. - -Required sub-node properties: -- compatible : depending on the SoC this should be one of: - "amlogic,meson8-smp-sram" - "amlogic,meson8b-smp-sram" - -The rest of the properties should follow the generic mmio-sram discription -found in ../../misc/sram.txt - -Example: - - sram: sram@d9000000 { - compatible = "mmio-sram"; - reg = <0xd9000000 0x20000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0xd9000000 0x20000>; - - smp-sram@1ff80 { - compatible = "amlogic,meson8b-smp-sram"; - reg = <0x1ff80 0x8>; - }; - }; diff --git a/dts/Bindings/arm/arm,scmi.txt b/dts/Bindings/arm/arm,scmi.txt index 083dbf96ee..f493d69e61 100644 --- a/dts/Bindings/arm/arm,scmi.txt +++ b/dts/Bindings/arm/arm,scmi.txt @@ -100,7 +100,7 @@ Required sub-node properties: [0] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/index.html [1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Documentation/devicetree/bindings/power/power_domain.txt +[2] Documentation/devicetree/bindings/power/power-domain.yaml [3] Documentation/devicetree/bindings/thermal/thermal.txt [4] Documentation/devicetree/bindings/sram/sram.txt [5] Documentation/devicetree/bindings/reset/reset.txt diff --git a/dts/Bindings/arm/arm,scpi.txt b/dts/Bindings/arm/arm,scpi.txt index 4018319736..7b83ef43b4 100644 --- a/dts/Bindings/arm/arm,scpi.txt +++ b/dts/Bindings/arm/arm,scpi.txt @@ -110,7 +110,7 @@ Required properties: [1] Documentation/devicetree/bindings/clock/clock-bindings.txt [2] Documentation/devicetree/bindings/thermal/thermal.txt [3] Documentation/devicetree/bindings/sram/sram.txt -[4] Documentation/devicetree/bindings/power/power_domain.txt +[4] Documentation/devicetree/bindings/power/power-domain.yaml Example: diff --git a/dts/Bindings/arm/atmel-at91.yaml b/dts/Bindings/arm/atmel-at91.yaml index 6e168abcd4..6dd8be4016 100644 --- a/dts/Bindings/arm/atmel-at91.yaml +++ b/dts/Bindings/arm/atmel-at91.yaml @@ -45,6 +45,13 @@ properties: - const: atmel,at91sam9x5 - const: atmel,at91sam9 + - description: Overkiz kizbox3 board + items: + - const: overkiz,kizbox3-hs + - const: atmel,sama5d27 + - const: atmel,sama5d2 + - const: atmel,sama5 + - items: - const: atmel,sama5d27 - const: atmel,sama5d2 @@ -73,6 +80,13 @@ properties: - const: atmel,sama5d3 - const: atmel,sama5 + - description: Overkiz kizbox2 board with two heads + items: + - const: overkiz,kizbox2-2 + - const: atmel,sama5d31 + - const: atmel,sama5d3 + - const: atmel,sama5 + - items: - enum: - atmel,sama5d31 diff --git a/dts/Bindings/arm/axentia.txt b/dts/Bindings/arm/axentia.txt deleted file mode 100644 index de58f24638..0000000000 --- a/dts/Bindings/arm/axentia.txt +++ /dev/null @@ -1,28 +0,0 @@ -Device tree bindings for Axentia ARM devices -============================================ - -Linea CPU module ----------------- - -Required root node properties: -compatible = "axentia,linea", - "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; -and following the rules from atmel-at91.txt for a sama5d31 SoC. - - -Nattis v2 board with Natte v2 power board ------------------------------------------ - -Required root node properties: -compatible = "axentia,nattis-2", "axentia,natte-2", "axentia,linea", - "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; -and following the rules from above for the axentia,linea CPU module. - - -TSE-850 v3 board ----------------- - -Required root node properties: -compatible = "axentia,tse850v3", "axentia,linea", - "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; -and following the rules from above for the axentia,linea CPU module. diff --git a/dts/Bindings/arm/bcm/bcm2835.yaml b/dts/Bindings/arm/bcm/bcm2835.yaml new file mode 100644 index 0000000000..dd52e29b06 --- /dev/null +++ b/dts/Bindings/arm/bcm/bcm2835.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/bcm/bcm2835.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM2711/BCM2835 Platforms Device Tree Bindings + +maintainers: + - Eric Anholt + - Stefan Wahren + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: BCM2711 based Boards + items: + - enum: + - raspberrypi,4-model-b + - const: brcm,bcm2711 + + - description: BCM2835 based Boards + items: + - enum: + - raspberrypi,model-a + - raspberrypi,model-a-plus + - raspberrypi,model-b + - raspberrypi,model-b-i2c0 # Raspberry Pi Model B (no P5) + - raspberrypi,model-b-rev2 + - raspberrypi,model-b-plus + - raspberrypi,compute-module + - raspberrypi,model-zero + - raspberrypi,model-zero-w + - const: brcm,bcm2835 + + - description: BCM2836 based Boards + items: + - enum: + - raspberrypi,2-model-b + - const: brcm,bcm2836 + + - description: BCM2837 based Boards + items: + - enum: + - raspberrypi,3-model-a-plus + - raspberrypi,3-model-b + - raspberrypi,3-model-b-plus + - raspberrypi,3-compute-module + - raspberrypi,3-compute-module-lite + - const: brcm,bcm2837 + +... diff --git a/dts/Bindings/arm/bcm/brcm,bcm2835.txt b/dts/Bindings/arm/bcm/brcm,bcm2835.txt deleted file mode 100644 index 245328f365..0000000000 --- a/dts/Bindings/arm/bcm/brcm,bcm2835.txt +++ /dev/null @@ -1,67 +0,0 @@ -Broadcom BCM2835 device tree bindings -------------------------------------------- - -Raspberry Pi Model A -Required root node properties: -compatible = "raspberrypi,model-a", "brcm,bcm2835"; - -Raspberry Pi Model A+ -Required root node properties: -compatible = "raspberrypi,model-a-plus", "brcm,bcm2835"; - -Raspberry Pi Model B -Required root node properties: -compatible = "raspberrypi,model-b", "brcm,bcm2835"; - -Raspberry Pi Model B (no P5) -early model B with I2C0 rather than I2C1 routed to the expansion header -Required root node properties: -compatible = "raspberrypi,model-b-i2c0", "brcm,bcm2835"; - -Raspberry Pi Model B rev2 -Required root node properties: -compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835"; - -Raspberry Pi Model B+ -Required root node properties: -compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; - -Raspberry Pi 2 Model B -Required root node properties: -compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; - -Raspberry Pi 3 Model A+ -Required root node properties: -compatible = "raspberrypi,3-model-a-plus", "brcm,bcm2837"; - -Raspberry Pi 3 Model B -Required root node properties: -compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; - -Raspberry Pi 3 Model B+ -Required root node properties: -compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837"; - -Raspberry Pi Compute Module -Required root node properties: -compatible = "raspberrypi,compute-module", "brcm,bcm2835"; - -Raspberry Pi Compute Module 3 -Required root node properties: -compatible = "raspberrypi,3-compute-module", "brcm,bcm2837"; - -Raspberry Pi Compute Module 3 Lite -Required root node properties: -compatible = "raspberrypi,3-compute-module-lite", "brcm,bcm2837"; - -Raspberry Pi Zero -Required root node properties: -compatible = "raspberrypi,model-zero", "brcm,bcm2835"; - -Raspberry Pi Zero W -Required root node properties: -compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; - -Generic BCM2835 board -Required root node properties: -compatible = "brcm,bcm2835"; diff --git a/dts/Bindings/arm/coresight.txt b/dts/Bindings/arm/coresight.txt index fcc3bacfd8..d02c42d21f 100644 --- a/dts/Bindings/arm/coresight.txt +++ b/dts/Bindings/arm/coresight.txt @@ -87,6 +87,15 @@ its hardware characteristcs. * port or ports: see "Graph bindings for Coresight" below. +* Optional properties for all components: + + * arm,coresight-loses-context-with-cpu : boolean. Indicates that the + hardware will lose register context on CPU power down (e.g. CPUIdle). + An example of where this may be needed are systems which contain a + coresight component and CPU in the same power domain. When the CPU + powers down the coresight component also powers down and loses its + context. This property is currently only used for the ETM 4.x driver. + * Optional properties for ETM/PTMs: * arm,cp14: must be present if the system accesses ETM/PTM management diff --git a/dts/Bindings/arm/cpus.yaml b/dts/Bindings/arm/cpus.yaml index cb30895e3b..c23c24ff75 100644 --- a/dts/Bindings/arm/cpus.yaml +++ b/dts/Bindings/arm/cpus.yaml @@ -189,6 +189,7 @@ properties: - marvell,armada-390-smp - marvell,armada-xp-smp - marvell,98dx3236-smp + - marvell,mmp3-smp - mediatek,mt6589-smp - mediatek,mt81xx-tz-smp - qcom,gcc-msm8660 diff --git a/dts/Bindings/arm/freescale/fsl,scu.txt b/dts/Bindings/arm/freescale/fsl,scu.txt index c149fadc6f..e07735a8c2 100644 --- a/dts/Bindings/arm/freescale/fsl,scu.txt +++ b/dts/Bindings/arm/freescale/fsl,scu.txt @@ -124,7 +124,7 @@ Required properties for Pinctrl sub nodes: CONFIG settings. [1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Documentation/devicetree/bindings/power/power_domain.txt +[2] Documentation/devicetree/bindings/power/power-domain.yaml [3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt RTC bindings based on SCU Message Protocol @@ -157,6 +157,15 @@ Required properties: Optional properties: - timeout-sec: contains the watchdog timeout in seconds. +SCU key bindings based on SCU Message Protocol +------------------------------------------------------------ + +Required properties: +- compatible: should be: + "fsl,imx8qxp-sc-key" + followed by "fsl,imx-sc-key"; +- linux,keycodes: See Documentation/devicetree/bindings/input/keys.txt + Example (imx8qxp): ------------- aliases { @@ -220,6 +229,11 @@ firmware { compatible = "fsl,imx8qxp-sc-rtc"; }; + scu_key: scu-key { + compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key"; + linux,keycodes = ; + }; + watchdog { compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt"; timeout-sec = <60>; diff --git a/dts/Bindings/arm/fsl.yaml b/dts/Bindings/arm/fsl.yaml index 1b4b4e6573..f79683a628 100644 --- a/dts/Bindings/arm/fsl.yaml +++ b/dts/Bindings/arm/fsl.yaml @@ -38,12 +38,16 @@ properties: - description: i.MX27 Product Development Kit items: - enum: + - armadeus,imx27-apf27 # APF27 SoM + - armadeus,imx27-apf27dev # APF27 SoM on APF27Dev board - fsl,imx27-pdk - const: fsl,imx27 - description: i.MX28 based Boards items: - enum: + - armadeus,imx28-apf28 # APF28 SoM + - armadeus,imx28-apf28dev # APF28 SoM on APF28Dev board - fsl,imx28-evk - i2se,duckbill - i2se,duckbill-2 @@ -87,7 +91,8 @@ properties: - description: i.MX51 Babbage Board items: - enum: - - armadeus,imx51-apf51 + - armadeus,imx51-apf51 # APF51 SoM + - armadeus,imx51-apf51dev # APF51 SoM on APF51Dev board - fsl,imx51-babbage - technologic,imx51-ts4800 - const: fsl,imx51 @@ -106,6 +111,8 @@ properties: - description: i.MX6Q based Boards items: - enum: + - armadeus,imx6q-apf6 # APF6 (Quad/Dual) SoM + - armadeus,imx6q-apf6dev # APF6 (Quad/Dual) SoM on APF6Dev board - emtrion,emcon-mx6 # emCON-MX6D or emCON-MX6Q SoM - emtrion,emcon-mx6-avari # emCON-MX6D or emCON-MX6Q SoM on Avari Base - fsl,imx6q-arm2 @@ -114,6 +121,11 @@ properties: - fsl,imx6q-sabresd - technologic,imx6q-ts4900 - technologic,imx6q-ts7970 + - toradex,apalis_imx6q # Apalis iMX6 Module + - toradex,apalis_imx6q-eval # Apalis iMX6 Module on Apalis Evaluation Board + - toradex,apalis_imx6q-ixora # Apalis iMX6 Module on Ixora + - toradex,apalis_imx6q-ixora-v1.1 # Apalis iMX6 Module on Ixora V1.1 + - variscite,dt6customboard - const: fsl,imx6q - description: i.MX6QP based Boards @@ -126,6 +138,8 @@ properties: - description: i.MX6DL based Boards items: - enum: + - armadeus,imx6dl-apf6 # APF6 (Solo) SoM + - armadeus,imx6dl-apf6dldev # APF6 (Solo) SoM on APF6Dev board - eckelmann,imx6dl-ci4x10 - emtrion,emcon-mx6 # emCON-MX6S or emCON-MX6DL SoM - emtrion,emcon-mx6-avari # emCON-MX6S or emCON-MX6DL SoM on Avari Base @@ -133,6 +147,8 @@ properties: - fsl,imx6dl-sabresd # i.MX6 DualLite SABRE Smart Device Board - technologic,imx6dl-ts4900 - technologic,imx6dl-ts7970 + - toradex,colibri_imx6dl # Colibri iMX6 Module + - toradex,colibri_imx6dl-eval-v3 # Colibri iMX6 Module on Colibri Evaluation Board V3 - ysoft,imx6dl-yapp4-draco # i.MX6 DualLite Y Soft IOTA Draco board - ysoft,imx6dl-yapp4-hydra # i.MX6 DualLite Y Soft IOTA Hydra board - ysoft,imx6dl-yapp4-ursa # i.MX6 Solo Y Soft IOTA Ursa board @@ -148,6 +164,7 @@ properties: items: - enum: - fsl,imx6sll-evk + - kobo,clarahd - const: fsl,imx6sll - description: i.MX6SX based Boards @@ -160,8 +177,11 @@ properties: - description: i.MX6UL based Boards items: - enum: + - armadeus,imx6ul-opos6ul # OPOS6UL (i.MX6UL) SoM + - armadeus,imx6ul-opos6uldev # OPOS6UL (i.MX6UL) SoM on OPOS6ULDev board - fsl,imx6ul-14x14-evk # i.MX6 UltraLite 14x14 EVK Board - kontron,imx6ul-n6310-som # Kontron N6310 SOM + - kontron,imx6ul-n6311-som # Kontron N6311 SOM - const: fsl,imx6ul - description: Kontron N6310 S Board @@ -170,6 +190,12 @@ properties: - const: kontron,imx6ul-n6310-som - const: fsl,imx6ul + - description: Kontron N6311 S Board + items: + - const: kontron,imx6ul-n6311-s + - const: kontron,imx6ul-n6311-som + - const: fsl,imx6ul + - description: Kontron N6310 S 43 Board items: - const: kontron,imx6ul-n6310-s-43 @@ -180,7 +206,18 @@ properties: - description: i.MX6ULL based Boards items: - enum: + - armadeus,imx6ull-opos6ul # OPOS6UL (i.MX6ULL) SoM + - armadeus,imx6ull-opos6uldev # OPOS6UL (i.MX6ULL) SoM on OPOS6ULDev board - fsl,imx6ull-14x14-evk # i.MX6 UltraLiteLite 14x14 EVK Board + - kontron,imx6ull-n6411-som # Kontron N6411 SOM + - toradex,colibri-imx6ull-eval # Colibri iMX6ULL Module on Colibri Evaluation Board + - toradex,colibri-imx6ull-wifi-eval # Colibri iMX6ULL Wi-Fi / Bluetooth Module on Colibri Evaluation Board + - const: fsl,imx6ull + + - description: Kontron N6411 S Board + items: + - const: kontron,imx6ull-n6411-s + - const: kontron,imx6ull-n6411-som - const: fsl,imx6ull - description: i.MX6ULZ based Boards @@ -193,6 +230,8 @@ properties: - description: i.MX7S based Boards items: - enum: + - toradex,colibri-imx7s # Colibri iMX7 Solo Module + - toradex,colibri-imx7s-eval-v3 # Colibri iMX7 Solo Module on Colibri Evaluation Board V3 - tq,imx7s-mba7 # i.MX7S TQ MBa7 with TQMa7S SoM - const: fsl,imx7s @@ -201,6 +240,10 @@ properties: - enum: - fsl,imx7d-sdb # i.MX7 SabreSD Board - novtech,imx7d-meerkat96 # i.MX7 Meerkat96 Board + - toradex,colibri-imx7d # Colibri iMX7 Dual Module + - toradex,colibri-imx7d-emmc # Colibri iMX7 Dual 1GB (eMMC) Module + - toradex,colibri-imx7d-emmc-eval-v3 # Colibri iMX7 Dual 1GB (eMMC) Module on Colibri Evaluation Board V3 + - toradex,colibri-imx7d-eval-v3 # Colibri iMX7 Dual Module on Colibri Evaluation Board V3 - tq,imx7d-mba7 # i.MX7D TQ MBa7 with TQMa7D SoM - zii,imx7d-rmu2 # ZII RMU2 Board - zii,imx7d-rpu2 # ZII RPU2 Board @@ -233,6 +276,7 @@ properties: items: - enum: - fsl,imx8mn-ddr4-evk # i.MX8MN DDR4 EVK Board + - fsl,imx8mn-evk # i.MX8MN LPDDR4 EVK Board - const: fsl,imx8mn - description: i.MX8MQ based Boards @@ -250,6 +294,8 @@ properties: - enum: - einfochips,imx8qxp-ai_ml # i.MX8QXP AI_ML Board - fsl,imx8qxp-mek # i.MX8QXP MEK Board + - toradex,colibri-imx8x # Colibri iMX8X Module + - toradex,colibri-imx8x-eval-v3 # Colibri iMX8X Module on Colibri Evaluation Board V3 - const: fsl,imx8qxp - description: @@ -267,6 +313,10 @@ properties: - fsl,vf600 - fsl,vf610 - fsl,vf610m4 + - toradex,vf500-colibri_vf50 # Colibri VF50 Module + - toradex,vf500-colibri_vf50-on-eval # Colibri VF50 Module on Colibri Evaluation Board + - toradex,vf610-colibri_vf61 # Colibri VF61 Module + - toradex,vf610-colibri_vf61-on-eval # Colibri VF61 Module on Colibri Evaluation Board - description: ZII's VF610 based Boards items: @@ -335,4 +385,10 @@ properties: - fsl,ls2088a-rdb - const: fsl,ls2088a + - description: S32V234 based Boards + items: + - enum: + - fsl,s32v234-evb # S32V234-EVB2 Customer Evaluation Board + - const: fsl,s32v234 + ... diff --git a/dts/Bindings/arm/marvell/ap806-system-controller.txt b/dts/Bindings/arm/marvell/ap806-system-controller.txt deleted file mode 100644 index 26410fbb85..0000000000 --- a/dts/Bindings/arm/marvell/ap806-system-controller.txt +++ /dev/null @@ -1,177 +0,0 @@ -Marvell Armada AP806 System Controller -====================================== - -The AP806 is one of the two core HW blocks of the Marvell Armada 7K/8K -SoCs. It contains system controllers, which provide several registers -giving access to numerous features: clocks, pin-muxing and many other -SoC configuration items. This DT binding allows to describe these -system controllers. - -For the top level node: - - compatible: must be: "syscon", "simple-mfd"; - - reg: register area of the AP806 system controller - -SYSTEM CONTROLLER 0 -=================== - -Clocks: -------- - - -The Device Tree node representing the AP806/AP807 system controller -provides a number of clocks: - - - 0: reference clock of CPU cluster 0 - - 1: reference clock of CPU cluster 1 - - 2: fixed PLL at 1200 Mhz - - 3: MSS clock, derived from the fixed PLL - -Required properties: - - - compatible: must be one of: - * "marvell,ap806-clock" - * "marvell,ap807-clock" - - #clock-cells: must be set to 1 - -Pinctrl: --------- - -For common binding part and usage, refer to -Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt. - -Required properties: -- compatible must be "marvell,ap806-pinctrl", - -Available mpp pins/groups and functions: -Note: brackets (x) are not part of the mpp name for marvell,function and given -only for more detailed description in this document. - -name pins functions -================================================================================ -mpp0 0 gpio, sdio(clk), spi0(clk) -mpp1 1 gpio, sdio(cmd), spi0(miso) -mpp2 2 gpio, sdio(d0), spi0(mosi) -mpp3 3 gpio, sdio(d1), spi0(cs0n) -mpp4 4 gpio, sdio(d2), i2c0(sda) -mpp5 5 gpio, sdio(d3), i2c0(sdk) -mpp6 6 gpio, sdio(ds) -mpp7 7 gpio, sdio(d4), uart1(rxd) -mpp8 8 gpio, sdio(d5), uart1(txd) -mpp9 9 gpio, sdio(d6), spi0(cs1n) -mpp10 10 gpio, sdio(d7) -mpp11 11 gpio, uart0(txd) -mpp12 12 gpio, sdio(pw_off), sdio(hw_rst) -mpp13 13 gpio -mpp14 14 gpio -mpp15 15 gpio -mpp16 16 gpio -mpp17 17 gpio -mpp18 18 gpio -mpp19 19 gpio, uart0(rxd), sdio(pw_off) - -GPIO: ------ -For common binding part and usage, refer to -Documentation/devicetree/bindings/gpio/gpio-mvebu.txt. - -Required properties: - -- compatible: "marvell,armada-8k-gpio" - -- offset: offset address inside the syscon block - -Example: -ap_syscon: system-controller@6f4000 { - compatible = "syscon", "simple-mfd"; - reg = <0x6f4000 0x1000>; - - ap_clk: clock { - compatible = "marvell,ap806-clock"; - #clock-cells = <1>; - }; - - ap_pinctrl: pinctrl { - compatible = "marvell,ap806-pinctrl"; - }; - - ap_gpio: gpio { - compatible = "marvell,armada-8k-gpio"; - offset = <0x1040>; - ngpios = <19>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&ap_pinctrl 0 0 19>; - }; -}; - -SYSTEM CONTROLLER 1 -=================== - -Thermal: --------- - -For common binding part and usage, refer to -Documentation/devicetree/bindings/thermal/thermal.txt - -The thermal IP can probe the temperature all around the processor. It -may feature several channels, each of them wired to one sensor. - -It is possible to setup an overheat interrupt by giving at least one -critical point to any subnode of the thermal-zone node. - -Required properties: -- compatible: must be one of: - * marvell,armada-ap806-thermal -- reg: register range associated with the thermal functions. - -Optional properties: -- interrupts: overheat interrupt handle. Should point to line 18 of the - SEI irqchip. See interrupt-controller/interrupts.txt -- #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer - to this IP and represents the channel ID. There is one sensor per - channel. O refers to the thermal IP internal channel, while positive - IDs refer to each CPU. - -Example: -ap_syscon1: system-controller@6f8000 { - compatible = "syscon", "simple-mfd"; - reg = <0x6f8000 0x1000>; - - ap_thermal: thermal-sensor@80 { - compatible = "marvell,armada-ap806-thermal"; - reg = <0x80 0x10>; - interrupt-parent = <&sei>; - interrupts = <18>; - #thermal-sensor-cells = <1>; - }; -}; - -Cluster clocks: ---------------- - -Device Tree Clock bindings for cluster clock of Marvell -AP806/AP807. Each cluster contain up to 2 CPUs running at the same -frequency. - -Required properties: - - compatible: must be one of: - * "marvell,ap806-cpu-clock" - * "marvell,ap807-cpu-clock" -- #clock-cells : should be set to 1. - -- clocks : shall be the input parent clock(s) phandle for the clock - (one per cluster) - -- reg: register range associated with the cluster clocks - -ap_syscon1: system-controller@6f8000 { - compatible = "marvell,armada-ap806-syscon1", "syscon", "simple-mfd"; - reg = <0x6f8000 0x1000>; - - cpu_clk: clock-cpu@278 { - compatible = "marvell,ap806-cpu-clock"; - clocks = <&ap_clk 0>, <&ap_clk 1>; - #clock-cells = <1>; - reg = <0x278 0xa30>; - }; -}; diff --git a/dts/Bindings/arm/marvell/ap80x-system-controller.txt b/dts/Bindings/arm/marvell/ap80x-system-controller.txt new file mode 100644 index 0000000000..098d932fc9 --- /dev/null +++ b/dts/Bindings/arm/marvell/ap80x-system-controller.txt @@ -0,0 +1,177 @@ +Marvell Armada AP80x System Controller +====================================== + +The AP806/AP807 is one of the two core HW blocks of the Marvell Armada +7K/8K/931x SoCs. It contains system controllers, which provide several +registers giving access to numerous features: clocks, pin-muxing and +many other SoC configuration items. This DT binding allows to describe +these system controllers. + +For the top level node: + - compatible: must be: "syscon", "simple-mfd"; + - reg: register area of the AP80x system controller + +SYSTEM CONTROLLER 0 +=================== + +Clocks: +------- + + +The Device Tree node representing the AP806/AP807 system controller +provides a number of clocks: + + - 0: reference clock of CPU cluster 0 + - 1: reference clock of CPU cluster 1 + - 2: fixed PLL at 1200 Mhz + - 3: MSS clock, derived from the fixed PLL + +Required properties: + + - compatible: must be one of: + * "marvell,ap806-clock" + * "marvell,ap807-clock" + - #clock-cells: must be set to 1 + +Pinctrl: +-------- + +For common binding part and usage, refer to +Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt. + +Required properties: +- compatible must be "marvell,ap806-pinctrl", + +Available mpp pins/groups and functions: +Note: brackets (x) are not part of the mpp name for marvell,function and given +only for more detailed description in this document. + +name pins functions +================================================================================ +mpp0 0 gpio, sdio(clk), spi0(clk) +mpp1 1 gpio, sdio(cmd), spi0(miso) +mpp2 2 gpio, sdio(d0), spi0(mosi) +mpp3 3 gpio, sdio(d1), spi0(cs0n) +mpp4 4 gpio, sdio(d2), i2c0(sda) +mpp5 5 gpio, sdio(d3), i2c0(sdk) +mpp6 6 gpio, sdio(ds) +mpp7 7 gpio, sdio(d4), uart1(rxd) +mpp8 8 gpio, sdio(d5), uart1(txd) +mpp9 9 gpio, sdio(d6), spi0(cs1n) +mpp10 10 gpio, sdio(d7) +mpp11 11 gpio, uart0(txd) +mpp12 12 gpio, sdio(pw_off), sdio(hw_rst) +mpp13 13 gpio +mpp14 14 gpio +mpp15 15 gpio +mpp16 16 gpio +mpp17 17 gpio +mpp18 18 gpio +mpp19 19 gpio, uart0(rxd), sdio(pw_off) + +GPIO: +----- +For common binding part and usage, refer to +Documentation/devicetree/bindings/gpio/gpio-mvebu.txt. + +Required properties: + +- compatible: "marvell,armada-8k-gpio" + +- offset: offset address inside the syscon block + +Example: +ap_syscon: system-controller@6f4000 { + compatible = "syscon", "simple-mfd"; + reg = <0x6f4000 0x1000>; + + ap_clk: clock { + compatible = "marvell,ap806-clock"; + #clock-cells = <1>; + }; + + ap_pinctrl: pinctrl { + compatible = "marvell,ap806-pinctrl"; + }; + + ap_gpio: gpio { + compatible = "marvell,armada-8k-gpio"; + offset = <0x1040>; + ngpios = <19>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&ap_pinctrl 0 0 19>; + }; +}; + +SYSTEM CONTROLLER 1 +=================== + +Thermal: +-------- + +For common binding part and usage, refer to +Documentation/devicetree/bindings/thermal/thermal.txt + +The thermal IP can probe the temperature all around the processor. It +may feature several channels, each of them wired to one sensor. + +It is possible to setup an overheat interrupt by giving at least one +critical point to any subnode of the thermal-zone node. + +Required properties: +- compatible: must be one of: + * marvell,armada-ap806-thermal +- reg: register range associated with the thermal functions. + +Optional properties: +- interrupts: overheat interrupt handle. Should point to line 18 of the + SEI irqchip. See interrupt-controller/interrupts.txt +- #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer + to this IP and represents the channel ID. There is one sensor per + channel. O refers to the thermal IP internal channel, while positive + IDs refer to each CPU. + +Example: +ap_syscon1: system-controller@6f8000 { + compatible = "syscon", "simple-mfd"; + reg = <0x6f8000 0x1000>; + + ap_thermal: thermal-sensor@80 { + compatible = "marvell,armada-ap806-thermal"; + reg = <0x80 0x10>; + interrupt-parent = <&sei>; + interrupts = <18>; + #thermal-sensor-cells = <1>; + }; +}; + +Cluster clocks: +--------------- + +Device Tree Clock bindings for cluster clock of Marvell +AP806/AP807. Each cluster contain up to 2 CPUs running at the same +frequency. + +Required properties: + - compatible: must be one of: + * "marvell,ap806-cpu-clock" + * "marvell,ap807-cpu-clock" +- #clock-cells : should be set to 1. + +- clocks : shall be the input parent clock(s) phandle for the clock + (one per cluster) + +- reg: register range associated with the cluster clocks + +ap_syscon1: system-controller@6f8000 { + compatible = "marvell,armada-ap806-syscon1", "syscon", "simple-mfd"; + reg = <0x6f8000 0x1000>; + + cpu_clk: clock-cpu@278 { + compatible = "marvell,ap806-cpu-clock"; + clocks = <&ap_clk 0>, <&ap_clk 1>; + #clock-cells = <1>; + reg = <0x278 0xa30>; + }; +}; diff --git a/dts/Bindings/arm/marvell/armada-7k-8k.txt b/dts/Bindings/arm/marvell/armada-7k-8k.txt deleted file mode 100644 index df98a9c82a..0000000000 --- a/dts/Bindings/arm/marvell/armada-7k-8k.txt +++ /dev/null @@ -1,24 +0,0 @@ -Marvell Armada 7K/8K Platforms Device Tree Bindings ---------------------------------------------------- - -Boards using a SoC of the Marvell Armada 7K or 8K families must carry -the following root node property: - - - compatible, with one of the following values: - - - "marvell,armada7020", "marvell,armada-ap806-dual", "marvell,armada-ap806" - when the SoC being used is the Armada 7020 - - - "marvell,armada7040", "marvell,armada-ap806-quad", "marvell,armada-ap806" - when the SoC being used is the Armada 7040 - - - "marvell,armada8020", "marvell,armada-ap806-dual", "marvell,armada-ap806" - when the SoC being used is the Armada 8020 - - - "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada-ap806" - when the SoC being used is the Armada 8040 - -Example: - -compatible = "marvell,armada7040-db", "marvell,armada7040", - "marvell,armada-ap806-quad", "marvell,armada-ap806"; diff --git a/dts/Bindings/arm/marvell/armada-7k-8k.yaml b/dts/Bindings/arm/marvell/armada-7k-8k.yaml new file mode 100644 index 0000000000..a9828c50c0 --- /dev/null +++ b/dts/Bindings/arm/marvell/armada-7k-8k.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR X11) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/armada-7k-8k.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 7K/8K Platforms Device Tree Bindings + +maintainers: + - Gregory CLEMENT + +properties: + $nodename: + const: '/' + compatible: + oneOf: + + - description: Armada 7020 SoC + items: + - const: marvell,armada7020 + - const: marvell,armada-ap806-dual + - const: marvell,armada-ap806 + + - description: Armada 7040 SoC + items: + - const: marvell,armada7040 + - const: marvell,armada-ap806-quad + - const: marvell,armada-ap806 + + - description: Armada 8020 SoC + items: + - const: marvell,armada8020 + - const: marvell,armada-ap806-dual + - const: marvell,armada-ap806 + + - description: Armada 8040 SoC + items: + - const: marvell,armada8040 + - const: marvell,armada-ap806-quad + - const: marvell,armada-ap806 + + - description: Armada CN9130 SoC with no external CP + items: + - const: marvell,cn9130 + - const: marvell,armada-ap807-quad + - const: marvell,armada-ap807 + + - description: Armada CN9131 SoC with one external CP + items: + - const: marvell,cn9131 + - const: marvell,cn9130 + - const: marvell,armada-ap807-quad + - const: marvell,armada-ap807 + + - description: Armada CN9132 SoC with two external CPs + items: + - const: marvell,cn9132 + - const: marvell,cn9131 + - const: marvell,cn9130 + - const: marvell,armada-ap807-quad + - const: marvell,armada-ap807 diff --git a/dts/Bindings/arm/mrvl/mrvl.txt b/dts/Bindings/arm/mrvl/mrvl.txt deleted file mode 100644 index 951687528e..0000000000 --- a/dts/Bindings/arm/mrvl/mrvl.txt +++ /dev/null @@ -1,14 +0,0 @@ -Marvell Platforms Device Tree Bindings ----------------------------------------------------- - -PXA168 Aspenite Board -Required root node properties: - - compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168"; - -PXA910 DKB Board -Required root node properties: - - compatible = "mrvl,pxa910-dkb"; - -MMP2 Brownstone Board -Required root node properties: - - compatible = "mrvl,mmp2-brownstone", "mrvl,mmp2"; diff --git a/dts/Bindings/arm/mrvl/mrvl.yaml b/dts/Bindings/arm/mrvl/mrvl.yaml new file mode 100644 index 0000000000..818dfe6de5 --- /dev/null +++ b/dts/Bindings/arm/mrvl/mrvl.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mrvl/mrvl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Platforms Device Tree Bindings + +maintainers: + - Lubomir Rintel + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: PXA168 Aspenite Board + items: + - enum: + - mrvl,pxa168-aspenite + - const: mrvl,pxa168 + - description: PXA910 DKB Board + items: + - enum: + - mrvl,pxa910-dkb + - const: mrvl,pxa910 + - description: MMP2 based boards + items: + - enum: + - mrvl,mmp2-brownstone + - const: mrvl,mmp2 + - description: MMP3 based boards + items: + - const: mrvl,mmp3 +... diff --git a/dts/Bindings/arm/msm/qcom,llcc.txt b/dts/Bindings/arm/msm/qcom,llcc.txt deleted file mode 100644 index eaee06b2d8..0000000000 --- a/dts/Bindings/arm/msm/qcom,llcc.txt +++ /dev/null @@ -1,41 +0,0 @@ -== Introduction== - -LLCC (Last Level Cache Controller) provides last level of cache memory in SOC, -that can be shared by multiple clients. Clients here are different cores in the -SOC, the idea is to minimize the local caches at the clients and migrate to -common pool of memory. Cache memory is divided into partitions called slices -which are assigned to clients. Clients can query the slice details, activate -and deactivate them. - -Properties: -- compatible: - Usage: required - Value type: - Definition: must be "qcom,sdm845-llcc" - -- reg: - Usage: required - Value Type: - Definition: The first element specifies the llcc base start address and - the size of the register region. The second element specifies - the llcc broadcast base address and size of the register region. - -- reg-names: - Usage: required - Value Type: - Definition: Register region names. Must be "llcc_base", "llcc_broadcast_base". - -- interrupts: - Usage: required - Definition: The interrupt is associated with the llcc edac device. - It's used for llcc cache single and double bit error detection - and reporting. - -Example: - - cache-controller@1100000 { - compatible = "qcom,sdm845-llcc"; - reg = <0x1100000 0x200000>, <0x1300000 0x50000> ; - reg-names = "llcc_base", "llcc_broadcast_base"; - interrupts = ; - }; diff --git a/dts/Bindings/arm/msm/qcom,llcc.yaml b/dts/Bindings/arm/msm/qcom,llcc.yaml new file mode 100644 index 0000000000..558749065b --- /dev/null +++ b/dts/Bindings/arm/msm/qcom,llcc.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/msm/qcom,llcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Last Level Cache Controller + +maintainers: + - Rishabh Bhatnagar + - Sai Prakash Ranjan + +description: | + LLCC (Last Level Cache Controller) provides last level of cache memory in SoC, + that can be shared by multiple clients. Clients here are different cores in the + SoC, the idea is to minimize the local caches at the clients and migrate to + common pool of memory. Cache memory is divided into partitions called slices + which are assigned to clients. Clients can query the slice details, activate + and deactivate them. + +properties: + compatible: + enum: + - qcom,sc7180-llcc + - qcom,sdm845-llcc + + reg: + items: + - description: LLCC base register region + - description: LLCC broadcast base register region + + reg-names: + items: + - const: llcc_base + - const: llcc_broadcast_base + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - reg-names + - interrupts + +examples: + - | + #include + + cache-controller@1100000 { + compatible = "qcom,sdm845-llcc"; + reg = <0x1100000 0x200000>, <0x1300000 0x50000> ; + reg-names = "llcc_base", "llcc_broadcast_base"; + interrupts = ; + }; diff --git a/dts/Bindings/arm/omap/omap.txt b/dts/Bindings/arm/omap/omap.txt index b301f753ed..e77635c542 100644 --- a/dts/Bindings/arm/omap/omap.txt +++ b/dts/Bindings/arm/omap/omap.txt @@ -43,7 +43,7 @@ SoC Families: - OMAP2 generic - defaults to OMAP2420 compatible = "ti,omap2" -- OMAP3 generic - defaults to OMAP3430 +- OMAP3 generic compatible = "ti,omap3" - OMAP4 generic - defaults to OMAP4430 compatible = "ti,omap4" @@ -51,6 +51,8 @@ SoC Families: compatible = "ti,omap5" - DRA7 generic - defaults to DRA742 compatible = "ti,dra7" +- AM33x generic + compatible = "ti,am33xx" - AM43x generic - defaults to AM4372 compatible = "ti,am43" @@ -63,12 +65,14 @@ SoCs: - OMAP3430 compatible = "ti,omap3430", "ti,omap3" + legacy: "ti,omap34xx" - please do not use any more - AM3517 compatible = "ti,am3517", "ti,omap3" - OMAP3630 - compatible = "ti,omap36xx", "ti,omap3" -- AM33xx - compatible = "ti,am33xx", "ti,omap3" + compatible = "ti,omap3630", "ti,omap3" + legacy: "ti,omap36xx" - please do not use any more +- AM335x + compatible = "ti,am33xx" - OMAP4430 compatible = "ti,omap4430", "ti,omap4" @@ -110,19 +114,19 @@ SoCs: - AM4372 compatible = "ti,am4372", "ti,am43" -Boards: +Boards (incomplete list of examples): - OMAP3 BeagleBoard : Low cost community board - compatible = "ti,omap3-beagle", "ti,omap3" + compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3" - OMAP3 Tobi with Overo : Commercial expansion board with daughter board - compatible = "gumstix,omap3-overo-tobi", "gumstix,omap3-overo", "ti,omap3" + compatible = "gumstix,omap3-overo-tobi", "gumstix,omap3-overo", "ti,omap3430", "ti,omap3" - OMAP4 SDP : Software Development Board - compatible = "ti,omap4-sdp", "ti,omap4430" + compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4" - OMAP4 PandaBoard : Low cost community board - compatible = "ti,omap4-panda", "ti,omap4430" + compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4" - OMAP4 DuoVero with Parlor : Commercial expansion board with daughter board compatible = "gumstix,omap4-duovero-parlor", "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4"; @@ -134,16 +138,16 @@ Boards: compatible = "variscite,var-dvk-om44", "variscite,var-som-om44", "ti,omap4460", "ti,omap4"; - OMAP3 EVM : Software Development Board for OMAP35x, AM/DM37x - compatible = "ti,omap3-evm", "ti,omap3" + compatible = "ti,omap3-evm", "ti,omap3630", "ti,omap3" - AM335X EVM : Software Development Board for AM335x - compatible = "ti,am335x-evm", "ti,am33xx", "ti,omap3" + compatible = "ti,am335x-evm", "ti,am33xx" - AM335X Bone : Low cost community board - compatible = "ti,am335x-bone", "ti,am33xx", "ti,omap3" + compatible = "ti,am335x-bone", "ti,am33xx" - AM3359 ICEv2 : Low cost Industrial Communication Engine EVM. - compatible = "ti,am3359-icev2", "ti,am33xx", "ti,omap3" + compatible = "ti,am3359-icev2", "ti,am33xx" - AM335X OrionLXm : Substation Automation Platform compatible = "novatech,am335x-lxm", "ti,am33xx" diff --git a/dts/Bindings/arm/omap/prm-inst.txt b/dts/Bindings/arm/omap/prm-inst.txt new file mode 100644 index 0000000000..fcd3456afb --- /dev/null +++ b/dts/Bindings/arm/omap/prm-inst.txt @@ -0,0 +1,29 @@ +OMAP PRM instance bindings + +Power and Reset Manager is an IP block on OMAP family of devices which +handle the power domains and their current state, and provide reset +handling for the domains and/or separate IP blocks under the power domain +hierarchy. + +Required properties: +- compatible: Must contain one of the following: + "ti,am3-prm-inst" + "ti,am4-prm-inst" + "ti,omap4-prm-inst" + "ti,omap5-prm-inst" + "ti,dra7-prm-inst" + and additionally must contain: + "ti,omap-prm-inst" +- reg: Contains PRM instance register address range + (base address and length) + +Optional properties: +- #reset-cells: Should be 1 if the PRM instance in question supports resets. + +Example: + +prm_dsp2: prm@1b00 { + compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; + reg = <0x1b00 0x40>; + #reset-cells = <1>; +}; diff --git a/dts/Bindings/arm/realtek.yaml b/dts/Bindings/arm/realtek.yaml index 3528b61963..ab59de1715 100644 --- a/dts/Bindings/arm/realtek.yaml +++ b/dts/Bindings/arm/realtek.yaml @@ -13,11 +13,24 @@ properties: $nodename: const: '/' compatible: - # RTD1295 SoC based boards - items: - - enum: - - mele,v9 - - probox2,ava - - zidoo,x9s - - const: realtek,rtd1295 + oneOf: + # RTD1293 SoC based boards + - items: + - enum: + - synology,ds418j # Synology DiskStation DS418j + - const: realtek,rtd1293 + + # RTD1295 SoC based boards + - items: + - enum: + - mele,v9 # MeLE V9 + - probox2,ava # ProBox2 AVA + - zidoo,x9s # Zidoo X9S + - const: realtek,rtd1295 + + # RTD1296 SoC based boards + - items: + - enum: + - synology,ds418 # Synology DiskStation DS418 + - const: realtek,rtd1296 ... diff --git a/dts/Bindings/arm/renesas,prr.txt b/dts/Bindings/arm/renesas,prr.txt deleted file mode 100644 index 08e482e953..0000000000 --- a/dts/Bindings/arm/renesas,prr.txt +++ /dev/null @@ -1,20 +0,0 @@ -Renesas Product Register - -Most Renesas ARM SoCs have a Product Register or Boundary Scan ID Register that -allows to retrieve SoC product and revision information. If present, a device -node for this register should be added. - -Required properties: - - compatible: Must be one of: - "renesas,prr" - "renesas,bsid" - - reg: Base address and length of the register block. - - -Examples --------- - - prr: chipid@ff000044 { - compatible = "renesas,prr"; - reg = <0 0xff000044 0 4>; - }; diff --git a/dts/Bindings/arm/renesas,prr.yaml b/dts/Bindings/arm/renesas,prr.yaml new file mode 100644 index 0000000000..7f8d17f339 --- /dev/null +++ b/dts/Bindings/arm/renesas,prr.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/renesas,prr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Product Register + +maintainers: + - Geert Uytterhoeven + - Magnus Damm + +description: | + Most Renesas ARM SoCs have a Product Register or Boundary Scan ID + Register that allows to retrieve SoC product and revision information. + If present, a device node for this register should be added. + +properties: + compatible: + enum: + - renesas,prr + - renesas,bsid + reg: + maxItems: 1 + +required: + - compatible + - reg + +examples: + - | + prr: chipid@ff000044 { + compatible = "renesas,prr"; + reg = <0 0xff000044 0 4>; + }; diff --git a/dts/Bindings/arm/renesas.yaml b/dts/Bindings/arm/renesas.yaml index 28eb458f76..9436124c58 100644 --- a/dts/Bindings/arm/renesas.yaml +++ b/dts/Bindings/arm/renesas.yaml @@ -116,6 +116,18 @@ properties: - const: hoperun,hihope-rzg2m - const: renesas,r8a774a1 + - description: RZ/G2N (R8A774B1) + items: + - enum: + - hoperun,hihope-rzg2n # HopeRun HiHope RZ/G2N platform + - const: renesas,r8a774b1 + + - items: + - enum: + - hoperun,hihope-rzg2-ex # HopeRun expansion board for HiHope RZ/G2 platforms + - const: hoperun,hihope-rzg2n + - const: renesas,r8a774b1 + - description: RZ/G2E (R8A774C0) items: - enum: @@ -193,15 +205,23 @@ properties: - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012S) - const: renesas,r8a7796 + - description: R-Car M3-W+ (R8A77961) + items: + - enum: + - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012SA5A) + - const: renesas,r8a77961 + - description: Kingfisher (SBEV-RCAR-KF-M03) items: - const: shimafuji,kingfisher - enum: - renesas,h3ulcb - renesas,m3ulcb + - renesas,m3nulcb - enum: - renesas,r8a7795 - renesas,r8a7796 + - renesas,r8a77965 - description: R-Car M3-N (R8A77965) items: diff --git a/dts/Bindings/arm/rockchip.yaml b/dts/Bindings/arm/rockchip.yaml index 9c7e70335a..d9847b306b 100644 --- a/dts/Bindings/arm/rockchip.yaml +++ b/dts/Bindings/arm/rockchip.yaml @@ -40,6 +40,11 @@ properties: - const: asus,rk3288-tinker-s - const: rockchip,rk3288 + - description: Beelink A1 + items: + - const: azw,beelink-a1 + - const: rockchip,rk3328 + - description: bq Curie 2 tablet items: - const: mundoreader,bq-curie2 @@ -82,6 +87,11 @@ properties: - const: firefly,firefly-rk3399 - const: rockchip,rk3399 + - description: Firefly ROC-RK3308-CC + items: + - const: firefly,roc-rk3308-cc + - const: rockchip,rk3308 + - description: Firefly roc-rk3328-cc items: - const: firefly,roc-rk3328-cc @@ -89,7 +99,9 @@ properties: - description: Firefly ROC-RK3399-PC items: - - const: firefly,roc-rk3399-pc + - enum: + - firefly,roc-rk3399-pc + - firefly,roc-rk3399-pc-mezzanine - const: rockchip,rk3399 - description: FriendlyElec NanoPi4 series boards @@ -464,6 +476,11 @@ properties: - rockchip,rk3288-evb-rk808 - const: rockchip,rk3288 + - description: Rockchip RK3308 Evaluation board + items: + - const: rockchip,rk3308-evb + - const: rockchip,rk3308 + - description: Rockchip RK3328 Evaluation board items: - const: rockchip,rk3328-evb diff --git a/dts/Bindings/arm/samsung/exynos-chipid.txt b/dts/Bindings/arm/samsung/exynos-chipid.txt deleted file mode 100644 index 85c5dfd4a7..0000000000 --- a/dts/Bindings/arm/samsung/exynos-chipid.txt +++ /dev/null @@ -1,12 +0,0 @@ -SAMSUNG Exynos SoCs Chipid driver. - -Required properties: -- compatible : Should at least contain "samsung,exynos4210-chipid". - -- reg: offset and length of the register set - -Example: - chipid@10000000 { - compatible = "samsung,exynos4210-chipid"; - reg = <0x10000000 0x100>; - }; diff --git a/dts/Bindings/arm/samsung/exynos-chipid.yaml b/dts/Bindings/arm/samsung/exynos-chipid.yaml new file mode 100644 index 0000000000..afcd70803c --- /dev/null +++ b/dts/Bindings/arm/samsung/exynos-chipid.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/samsung/exynos-chipid.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos SoC series Chipid driver + +maintainers: + - Krzysztof Kozlowski + +properties: + compatible: + items: + - const: samsung,exynos4210-chipid + + reg: + maxItems: 1 + + samsung,asv-bin: + description: + Adaptive Supply Voltage bin selection. This can be used + to determine the ASV bin of an SoC if respective information + is missing in the CHIPID registers or in the OTP memory. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [ 0, 1, 2, 3 ] + +required: + - compatible + - reg + +examples: + - | + chipid@10000000 { + compatible = "samsung,exynos4210-chipid"; + reg = <0x10000000 0x100>; + samsung,asv-bin = <2>; + }; diff --git a/dts/Bindings/arm/samsung/pmu.txt b/dts/Bindings/arm/samsung/pmu.txt deleted file mode 100644 index 433bfd7593..0000000000 --- a/dts/Bindings/arm/samsung/pmu.txt +++ /dev/null @@ -1,72 +0,0 @@ -SAMSUNG Exynos SoC series PMU Registers - -Properties: - - compatible : should contain two values. First value must be one from following list: - - "samsung,exynos3250-pmu" - for Exynos3250 SoC, - - "samsung,exynos4210-pmu" - for Exynos4210 SoC, - - "samsung,exynos4412-pmu" - for Exynos4412 SoC, - - "samsung,exynos5250-pmu" - for Exynos5250 SoC, - - "samsung,exynos5260-pmu" - for Exynos5260 SoC. - - "samsung,exynos5410-pmu" - for Exynos5410 SoC, - - "samsung,exynos5420-pmu" - for Exynos5420 SoC. - - "samsung,exynos5433-pmu" - for Exynos5433 SoC. - - "samsung,exynos7-pmu" - for Exynos7 SoC. - second value must be always "syscon". - - - reg : offset and length of the register set. - - - #clock-cells : must be <1>, since PMU requires once cell as clock specifier. - The single specifier cell is used as index to list of clocks - provided by PMU, which is currently: - 0 : SoC clock output (CLKOUT pin) - - - clock-names : list of clock names for particular CLKOUT mux inputs in - following format: - "clkoutN", where N is a decimal number corresponding to - CLKOUT mux control bits value for given input, e.g. - "clkout0", "clkout7", "clkout15". - - - clocks : list of phandles and specifiers to all input clocks listed in - clock-names property. - -Optional properties: - -Some PMUs are capable of behaving as an interrupt controller (mostly -to wake up a suspended PMU). In which case, they can have the -following properties: - -- interrupt-controller: indicate that said PMU is an interrupt controller - -- #interrupt-cells: must be identical to the that of the parent interrupt - controller. - - -Optional nodes: - -- nodes defining the restart and poweroff syscon children - - -Example : -pmu_system_controller: system-controller@10040000 { - compatible = "samsung,exynos5250-pmu", "syscon"; - reg = <0x10040000 0x5000>; - interrupt-controller; - #interrupt-cells = <3>; - interrupt-parent = <&gic>; - #clock-cells = <1>; - clock-names = "clkout0", "clkout1", "clkout2", "clkout3", - "clkout4", "clkout8", "clkout9"; - clocks = <&clock CLK_OUT_DMC>, <&clock CLK_OUT_TOP>, - <&clock CLK_OUT_LEFTBUS>, <&clock CLK_OUT_RIGHTBUS>, - <&clock CLK_OUT_CPU>, <&clock CLK_XXTI>, - <&clock CLK_XUSBXTI>; -}; - -Example of clock consumer : - -usb3503: usb3503@8 { - /* ... */ - clock-names = "refclk"; - clocks = <&pmu_system_controller 0>; - /* ... */ -}; diff --git a/dts/Bindings/arm/samsung/pmu.yaml b/dts/Bindings/arm/samsung/pmu.yaml new file mode 100644 index 0000000000..73b56fc5bf --- /dev/null +++ b/dts/Bindings/arm/samsung/pmu.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/samsung/pmu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos SoC series Power Management Unit (PMU) + +maintainers: + - Krzysztof Kozlowski + +# Custom select to avoid matching all nodes with 'syscon' +select: + properties: + compatible: + contains: + enum: + - samsung,exynos3250-pmu + - samsung,exynos4210-pmu + - samsung,exynos4412-pmu + - samsung,exynos5250-pmu + - samsung,exynos5260-pmu + - samsung,exynos5410-pmu + - samsung,exynos5420-pmu + - samsung,exynos5433-pmu + - samsung,exynos7-pmu + required: + - compatible + +properties: + compatible: + items: + - enum: + - samsung,exynos3250-pmu + - samsung,exynos4210-pmu + - samsung,exynos4412-pmu + - samsung,exynos5250-pmu + - samsung,exynos5260-pmu + - samsung,exynos5410-pmu + - samsung,exynos5420-pmu + - samsung,exynos5433-pmu + - samsung,exynos7-pmu + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + clock-names: + description: + List of clock names for particular CLKOUT mux inputs + minItems: 1 + maxItems: 32 + items: + pattern: '^clkout([0-9]|[12][0-9]|3[0-1])$' + + clocks: + minItems: 1 + maxItems: 32 + + interrupt-controller: + description: + Some PMUs are capable of behaving as an interrupt controller (mostly + to wake up a suspended PMU). + + '#interrupt-cells': + description: + Must be identical to the that of the parent interrupt controller. + const: 3 + + syscon-poweroff: + $ref: "../../power/reset/syscon-poweroff.yaml#" + type: object + description: + Node for power off method + + syscon-reboot: + $ref: "../../power/reset/syscon-reboot.yaml#" + type: object + description: + Node for reboot method + +required: + - compatible + - reg + - '#clock-cells' + - clock-names + - clocks + +examples: + - | + #include + + pmu_system_controller: system-controller@10040000 { + compatible = "samsung,exynos5250-pmu", "syscon"; + reg = <0x10040000 0x5000>; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + #clock-cells = <1>; + clock-names = "clkout16"; + clocks = <&clock CLK_FIN_PLL>; + }; diff --git a/dts/Bindings/arm/samsung/samsung-boards.txt b/dts/Bindings/arm/samsung/samsung-boards.txt deleted file mode 100644 index 56021bf2a9..0000000000 --- a/dts/Bindings/arm/samsung/samsung-boards.txt +++ /dev/null @@ -1,83 +0,0 @@ -* Samsung's Exynos and S5P SoC based boards - -Required root node properties: - - compatible = should be one or more of the following. - - "samsung,aries" - for S5PV210-based Samsung Aries board. - - "samsung,fascinate4g" - for S5PV210-based Samsung Galaxy S Fascinate 4G (SGH-T959P) board. - - "samsung,galaxys" - for S5PV210-based Samsung Galaxy S (i9000) board. - - "samsung,artik5" - for Exynos3250-based Samsung ARTIK5 module. - - "samsung,artik5-eval" - for Exynos3250-based Samsung ARTIK5 eval board. - - "samsung,monk" - for Exynos3250-based Samsung Simband board. - - "samsung,rinato" - for Exynos3250-based Samsung Gear2 board. - - "samsung,smdkv310" - for Exynos4210-based Samsung SMDKV310 eval board. - - "samsung,trats" - for Exynos4210-based Tizen Reference board. - - "samsung,universal_c210" - for Exynos4210-based Samsung board. - - "samsung,i9300" - for Exynos4412-based Samsung GT-I9300 board. - - "samsung,i9305" - for Exynos4412-based Samsung GT-I9305 board. - - "samsung,midas" - for Exynos4412-based Samsung Midas board. - - "samsung,smdk4412", - for Exynos4412-based Samsung SMDK4412 eval board. - - "samsung,n710x" - for Exynos4412-based Samsung GT-N7100/GT-N7105 board. - - "samsung,trats2" - for Exynos4412-based Tizen Reference board. - - "samsung,smdk5250" - for Exynos5250-based Samsung SMDK5250 eval board. - - "samsung,xyref5260" - for Exynos5260-based Samsung board. - - "samsung,smdk5410" - for Exynos5410-based Samsung SMDK5410 eval board. - - "samsung,smdk5420" - for Exynos5420-based Samsung SMDK5420 eval board. - - "samsung,tm2" - for Exynos5433-based Samsung TM2 board. - - "samsung,tm2e" - for Exynos5433-based Samsung TM2E board. - -* Other companies Exynos SoC based - * FriendlyARM - - "friendlyarm,tiny4412" - for Exynos4412-based FriendlyARM - TINY4412 board. - * TOPEET - - "topeet,itop4412-elite" - for Exynos4412-based TOPEET - Elite base board. - - * Google - - "google,pi" - for Exynos5800-based Google Peach Pi - Rev 10+ board, - also: "google,pi-rev16", "google,pi-rev15", "google,pi-rev14", - "google,pi-rev13", "google,pi-rev12", "google,pi-rev11", - "google,pi-rev10", "google,peach". - - - "google,pit" - for Exynos5420-based Google Peach Pit - Rev 6+ (Exynos5420), - also: "google,pit-rev16", "google,pit-rev15", "google,pit-rev14", - "google,pit-rev13", "google,pit-rev12", "google,pit-rev11", - "google,pit-rev10", "google,pit-rev9", "google,pit-rev8", - "google,pit-rev7", "google,pit-rev6", "google,peach". - - - "google,snow-rev4" - for Exynos5250-based Google Snow board, - also: "google,snow" - - "google,snow-rev5" - for Exynos5250-based Google Snow - Rev 5+ board. - - "google,spring" - for Exynos5250-based Google Spring board. - - * Hardkernel - - "hardkernel,odroid-u3" - for Exynos4412-based Hardkernel Odroid U3. - - "hardkernel,odroid-x" - for Exynos4412-based Hardkernel Odroid X. - - "hardkernel,odroid-x2" - for Exynos4412-based Hardkernel Odroid X2. - - "hardkernel,odroid-xu" - for Exynos5410-based Hardkernel Odroid XU. - - "hardkernel,odroid-xu3" - for Exynos5422-based Hardkernel Odroid XU3. - - "hardkernel,odroid-xu3-lite" - for Exynos5422-based Hardkernel - Odroid XU3 Lite board. - - "hardkernel,odroid-xu4" - for Exynos5422-based Hardkernel Odroid XU4. - - "hardkernel,odroid-hc1" - for Exynos5422-based Hardkernel Odroid HC1. - - * Insignal - - "insignal,arndale" - for Exynos5250-based Insignal Arndale board. - - "insignal,arndale-octa" - for Exynos5420-based Insignal Arndale - Octa board. - - "insignal,origen" - for Exynos4210-based Insignal Origen board. - - "insignal,origen4412" - for Exynos4412-based Insignal Origen board. - - -Optional nodes: - - firmware node, specifying presence and type of secure firmware: - - compatible: only "samsung,secure-firmware" is currently supported - - reg: address of non-secure SYSRAM used for communication with firmware - - firmware@203f000 { - compatible = "samsung,secure-firmware"; - reg = <0x0203F000 0x1000>; - }; diff --git a/dts/Bindings/arm/samsung/samsung-boards.yaml b/dts/Bindings/arm/samsung/samsung-boards.yaml new file mode 100644 index 0000000000..63acd57c47 --- /dev/null +++ b/dts/Bindings/arm/samsung/samsung-boards.yaml @@ -0,0 +1,181 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/samsung/samsung-boards.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos and S5P SoC based boards + +maintainers: + - Krzysztof Kozlowski + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: S5PV210 based boards + items: + - enum: + - aesop,torbreck # aESOP Torbreck based on S5PV210 + - samsung,aquila # Samsung Aquila based on S5PC110 + - samsung,goni # Samsung Goni based on S5PC110 + - yic,smdkc110 # YIC System SMDKC110 based on S5PC110 + - yic,smdkv210 # YIC System SMDKV210 based on S5PV210 + - const: samsung,s5pv210 + + - description: S5PV210 based Aries boards + items: + - enum: + - samsung,fascinate4g # Samsung Galaxy S Fascinate 4G (SGH-T959P) + - samsung,galaxys # Samsung Galaxy S (i9000) + - const: samsung,aries + - const: samsung,s5pv210 + + - description: Exynos3250 based boards + items: + - enum: + - samsung,monk # Samsung Simband + - samsung,rinato # Samsung Gear2 + - const: samsung,exynos3250 + - const: samsung,exynos3 + + - description: Samsung ARTIK5 boards + items: + - enum: + - samsung,artik5-eval # Samsung ARTIK5 eval board + - const: samsung,artik5 # Samsung ARTIK5 module + - const: samsung,exynos3250 + - const: samsung,exynos3 + + - description: Exynos4210 based boards + items: + - enum: + - insignal,origen # Insignal Origen + - samsung,smdkv310 # Samsung SMDKV310 eval + - samsung,trats # Samsung Tizen Reference + - samsung,universal_c210 # Samsung C210 + - const: samsung,exynos4210 + - const: samsung,exynos4 + + - description: Exynos4412 based boards + items: + - enum: + - friendlyarm,tiny4412 # FriendlyARM TINY4412 + - hardkernel,odroid-u3 # Hardkernel Odroid U3 + - hardkernel,odroid-x # Hardkernel Odroid X + - hardkernel,odroid-x2 # Hardkernel Odroid X2 + - insignal,origen4412 # Insignal Origen + - samsung,smdk4412 # Samsung SMDK4412 eval + - topeet,itop4412-elite # TOPEET Elite base + - const: samsung,exynos4412 + - const: samsung,exynos4 + + - description: Samsung Midas family boards + items: + - enum: + - samsung,i9300 # Samsung GT-I9300 + - samsung,i9305 # Samsung GT-I9305 + - samsung,n710x # Samsung GT-N7100/GT-N7105 + - samsung,trats2 # Samsung Tizen Reference + - const: samsung,midas + - const: samsung,exynos4412 + - const: samsung,exynos4 + + - description: Exynos5250 based boards + items: + - enum: + - google,snow-rev5 # Google Snow Rev 5+ + - google,spring # Google Spring + - insignal,arndale # Insignal Arndale + - samsung,smdk5250 # Samsung SMDK5250 eval + - const: samsung,exynos5250 + - const: samsung,exynos5 + + - description: Google Snow Boards (Rev 4+) + items: + - const: google,snow-rev4 + - const: google,snow + - const: samsung,exynos5250 + - const: samsung,exynos5 + + - description: Exynos5260 based boards + items: + - enum: + - samsung,xyref5260 # Samsung Xyref5260 eval + - const: samsung,exynos5260 + - const: samsung,exynos5 + + - description: Exynos5410 based boards + items: + - enum: + - hardkernel,odroid-xu # Hardkernel Odroid XU + - samsung,smdk5410 # Samsung SMDK5410 eval + - const: samsung,exynos5410 + - const: samsung,exynos5 + + - description: Exynos5420 based boards + items: + - enum: + - insignal,arndale-octa # Insignal Arndale Octa + - samsung,smdk5420 # Samsung SMDK5420 eval + - const: samsung,exynos5420 + - const: samsung,exynos5 + + - description: Google Peach Pit Boards (Rev 6+) + items: + - const: google,pit-rev16 + - const: google,pit-rev15 + - const: google,pit-rev14 + - const: google,pit-rev13 + - const: google,pit-rev12 + - const: google,pit-rev11 + - const: google,pit-rev10 + - const: google,pit-rev9 + - const: google,pit-rev8 + - const: google,pit-rev7 + - const: google,pit-rev6 + - const: google,pit + - const: google,peach + - const: samsung,exynos5420 + - const: samsung,exynos5 + + - description: Exynos5800 based boards + items: + - enum: + - hardkernel,odroid-xu3 # Hardkernel Odroid XU3 + - hardkernel,odroid-xu3-lite # Hardkernel Odroid XU3 Lite + - hardkernel,odroid-xu4 # Hardkernel Odroid XU4 + - hardkernel,odroid-hc1 # Hardkernel Odroid HC1 + - const: samsung,exynos5800 + - const: samsung,exynos5 + + - description: Google Peach Pi Boards (Rev 10+) + items: + - const: google,pi-rev16 + - const: google,pi-rev15 + - const: google,pi-rev14 + - const: google,pi-rev13 + - const: google,pi-rev12 + - const: google,pi-rev11 + - const: google,pi-rev10 + - const: google,pi + - const: google,peach + - const: samsung,exynos5800 + - const: samsung,exynos5 + + - description: Exynos5433 based boards + items: + - enum: + - samsung,tm2 # Samsung TM2 + - samsung,tm2e # Samsung TM2E + - const: samsung,exynos5433 + + - description: Exynos7 based boards + items: + - enum: + - samsung,exynos7-espresso # Samsung Exynos7 Espresso + - const: samsung,exynos7 + +required: + - compatible diff --git a/dts/Bindings/arm/samsung/samsung-secure-firmware.yaml b/dts/Bindings/arm/samsung/samsung-secure-firmware.yaml new file mode 100644 index 0000000000..51d23b6f8a --- /dev/null +++ b/dts/Bindings/arm/samsung/samsung-secure-firmware.yaml @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/samsung/samsung-secure-firmware.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos Secure Firmware + +maintainers: + - Krzysztof Kozlowski + +properties: + compatible: + items: + - const: samsung,secure-firmware + + reg: + description: + Address of non-secure SYSRAM used for communication with firmware. + maxItems: 1 + +required: + - compatible + - reg + +examples: + - | + firmware@203f000 { + compatible = "samsung,secure-firmware"; + reg = <0x0203f000 0x1000>; + }; diff --git a/dts/Bindings/arm/samsung/sysreg.txt b/dts/Bindings/arm/samsung/sysreg.txt deleted file mode 100644 index 4fced6e9d5..0000000000 --- a/dts/Bindings/arm/samsung/sysreg.txt +++ /dev/null @@ -1,19 +0,0 @@ -SAMSUNG S5P/Exynos SoC series System Registers (SYSREG) - -Properties: - - compatible : should contain two values. First value must be one from following list: - - "samsung,exynos4-sysreg" - for Exynos4 based SoCs, - - "samsung,exynos5-sysreg" - for Exynos5 based SoCs. - second value must be always "syscon". - - reg : offset and length of the register set. - -Example: - syscon@10010000 { - compatible = "samsung,exynos4-sysreg", "syscon"; - reg = <0x10010000 0x400>; - }; - - syscon@10050000 { - compatible = "samsung,exynos5-sysreg", "syscon"; - reg = <0x10050000 0x5000>; - }; diff --git a/dts/Bindings/arm/samsung/sysreg.yaml b/dts/Bindings/arm/samsung/sysreg.yaml new file mode 100644 index 0000000000..3b7811804c --- /dev/null +++ b/dts/Bindings/arm/samsung/sysreg.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/samsung/sysreg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S5P/Exynos SoC series System Registers (SYSREG) + +maintainers: + - Krzysztof Kozlowski + +# Custom select to avoid matching all nodes with 'syscon' +select: + properties: + compatible: + contains: + enum: + - samsung,exynos4-sysreg + - samsung,exynos5-sysreg + required: + - compatible + +properties: + compatible: + allOf: + - items: + - enum: + - samsung,exynos4-sysreg + - samsung,exynos5-sysreg + - const: syscon + + reg: + maxItems: 1 + +examples: + - | + syscon@10010000 { + compatible = "samsung,exynos4-sysreg", "syscon"; + reg = <0x10010000 0x400>; + }; + + syscon@10050000 { + compatible = "samsung,exynos5-sysreg", "syscon"; + reg = <0x10050000 0x5000>; + }; diff --git a/dts/Bindings/arm/sprd.txt b/dts/Bindings/arm/sprd.txt deleted file mode 100644 index 3df034b13e..0000000000 --- a/dts/Bindings/arm/sprd.txt +++ /dev/null @@ -1,14 +0,0 @@ -Spreadtrum SoC Platforms Device Tree Bindings ----------------------------------------------------- - -SC9836 openphone Board -Required root node properties: - - compatible = "sprd,sc9836-openphone", "sprd,sc9836"; - -SC9860 SoC -Required root node properties: - - compatible = "sprd,sc9860" - -SP9860G 3GFHD Board -Required root node properties: - - compatible = "sprd,sp9860g-1h10", "sprd,sc9860"; diff --git a/dts/Bindings/arm/sprd.yaml b/dts/Bindings/arm/sprd.yaml new file mode 100644 index 0000000000..c35fb845cc --- /dev/null +++ b/dts/Bindings/arm/sprd.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2019 Unisoc Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/sprd.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Unisoc platforms device tree bindings + +maintainers: + - Orson Zhai + - Baolin Wang + - Chunyan Zhang + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - sprd,sc9836-openphone + - const: sprd,sc9836 + - items: + - enum: + - sprd,sp9860g-1h10 + - const: sprd,sc9860 + - items: + - enum: + - sprd,sp9863a-1h10 + - const: sprd,sc9863a + +... diff --git a/dts/Bindings/arm/stm32/stm32.yaml b/dts/Bindings/arm/stm32/stm32.yaml index 4d194f1eb0..1fcf306bd2 100644 --- a/dts/Bindings/arm/stm32/stm32.yaml +++ b/dts/Bindings/arm/stm32/stm32.yaml @@ -13,19 +13,38 @@ properties: compatible: oneOf: - items: + - enum: + - st,stm32f429i-disco + - st,stm32429i-eval - const: st,stm32f429 - - items: + - enum: + - st,stm32f469i-disco - const: st,stm32f469 - - items: + - enum: + - st,stm32f746-disco + - st,stm32746g-eval - const: st,stm32f746 - - items: + - enum: + - st,stm32f769-disco + - const: st,stm32f769 + - items: + - enum: + - st,stm32h743i-disco + - st,stm32h743i-eval - const: st,stm32h743 - - items: - enum: - arrow,stm32mp157a-avenger96 # Avenger96 + - st,stm32mp157c-ed1 + - st,stm32mp157a-dk1 + - st,stm32mp157c-dk2 + + - const: st,stm32mp157 + - items: + - const: st,stm32mp157c-ev1 + - const: st,stm32mp157c-ed1 - const: st,stm32mp157 ... diff --git a/dts/Bindings/arm/sunxi.yaml b/dts/Bindings/arm/sunxi.yaml index 972b1e9ee8..8a1e38a1d7 100644 --- a/dts/Bindings/arm/sunxi.yaml +++ b/dts/Bindings/arm/sunxi.yaml @@ -211,6 +211,11 @@ properties: - const: friendlyarm,nanopi-a64 - const: allwinner,sun50i-a64 + - description: FriendlyARM NanoPi Duo2 + items: + - const: friendlyarm,nanopi-duo2 + - const: allwinner,sun8i-h3 + - description: FriendlyARM NanoPi M1 items: - const: friendlyarm,nanopi-m1 diff --git a/dts/Bindings/arm/sunxi/smp-sram.txt b/dts/Bindings/arm/sunxi/smp-sram.txt deleted file mode 100644 index 082e6a9382..0000000000 --- a/dts/Bindings/arm/sunxi/smp-sram.txt +++ /dev/null @@ -1,44 +0,0 @@ -Allwinner SRAM for smp bringup: ------------------------------------------------- - -Allwinner's A80 SoC uses part of the secure sram for hotplugging of the -primary core (cpu0). Once the core gets powered up it checks if a magic -value is set at a specific location. If it is then the BROM will jump -to the software entry address, instead of executing a standard boot. - -Therefore a reserved section sub-node has to be added to the mmio-sram -declaration. - -Note that this is separate from the Allwinner SRAM controller found in -../../sram/sunxi-sram.txt. This SRAM is secure only and not mappable to -any device. - -Also there are no "secure-only" properties. The implementation should -check if this SRAM is usable first. - -Required sub-node properties: -- compatible : depending on the SoC this should be one of: - "allwinner,sun9i-a80-smp-sram" - -The rest of the properties should follow the generic mmio-sram discription -found in ../../misc/sram.txt - -Example: - - sram_b: sram@20000 { - /* 256 KiB secure SRAM at 0x20000 */ - compatible = "mmio-sram"; - reg = <0x00020000 0x40000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x00020000 0x40000>; - - smp-sram@1000 { - /* - * This is checked by BROM to determine if - * cpu0 should jump to SMP entry vector - */ - compatible = "allwinner,sun9i-a80-smp-sram"; - reg = <0x1000 0x8>; - }; - }; diff --git a/dts/Bindings/arm/sunxi/sunxi-mbus.txt b/dts/Bindings/arm/sunxi/sunxi-mbus.txt index 1464a47135..2005bb4867 100644 --- a/dts/Bindings/arm/sunxi/sunxi-mbus.txt +++ b/dts/Bindings/arm/sunxi/sunxi-mbus.txt @@ -8,6 +8,7 @@ bus. Required properties: - compatible: Must be one of: - allwinner,sun5i-a13-mbus + - allwinner,sun8i-h3-mbus - reg: Offset and length of the register set for the controller - clocks: phandle to the clock driving the controller - dma-ranges: See section 2.3.9 of the DeviceTree Specification -- cgit v1.2.3