From a4f4bc65b33164eb8c19bcff9834cc87bcc845bb Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 13 Jun 2016 07:29:57 +0200 Subject: dts: update to v4.6-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/arm/altera/socfpga-eccmgr.txt | 49 ++++++++++ dts/Bindings/arm/amlogic.txt | 7 ++ dts/Bindings/arm/arm-boards | 5 +- dts/Bindings/arm/armada-370-xp-pmsu.txt | 21 ----- dts/Bindings/arm/armada-370-xp.txt | 24 ----- dts/Bindings/arm/armada-375.txt | 9 -- dts/Bindings/arm/armada-380-mpcore-soc-ctrl.txt | 14 --- dts/Bindings/arm/armada-38x.txt | 27 ------ dts/Bindings/arm/armada-39x.txt | 20 ---- dts/Bindings/arm/armada-cpu-reset.txt | 14 --- dts/Bindings/arm/axis.txt | 29 ++++++ dts/Bindings/arm/bcm/brcm,vulcan-soc.txt | 10 ++ dts/Bindings/arm/cci.txt | 2 + dts/Bindings/arm/coherency-fabric.txt | 48 ---------- dts/Bindings/arm/cpus.txt | 4 +- dts/Bindings/arm/fw-cfg.txt | 38 +------- dts/Bindings/arm/keystone/keystone.txt | 5 + dts/Bindings/arm/kirkwood.txt | 27 ------ dts/Bindings/arm/lpc32xx.txt | 8 -- dts/Bindings/arm/marvell,berlin.txt | 96 ------------------- dts/Bindings/arm/marvell,dove.txt | 22 ----- dts/Bindings/arm/marvell,kirkwood.txt | 102 -------------------- dts/Bindings/arm/marvell/armada-370-xp-pmsu.txt | 21 +++++ dts/Bindings/arm/marvell/armada-370-xp.txt | 24 +++++ dts/Bindings/arm/marvell/armada-375.txt | 9 ++ dts/Bindings/arm/marvell/armada-37xx.txt | 16 ++++ .../arm/marvell/armada-380-mpcore-soc-ctrl.txt | 14 +++ dts/Bindings/arm/marvell/armada-38x.txt | 27 ++++++ dts/Bindings/arm/marvell/armada-39x.txt | 20 ++++ dts/Bindings/arm/marvell/armada-7k-8k.txt | 24 +++++ dts/Bindings/arm/marvell/armada-cpu-reset.txt | 14 +++ dts/Bindings/arm/marvell/coherency-fabric.txt | 48 ++++++++++ dts/Bindings/arm/marvell/kirkwood.txt | 27 ++++++ dts/Bindings/arm/marvell/marvell,berlin.txt | 96 +++++++++++++++++++ dts/Bindings/arm/marvell/marvell,dove.txt | 22 +++++ dts/Bindings/arm/marvell/marvell,kirkwood.txt | 105 +++++++++++++++++++++ dts/Bindings/arm/marvell/mvebu-cpu-config.txt | 20 ++++ .../arm/marvell/mvebu-system-controller.txt | 18 ++++ dts/Bindings/arm/mediatek.txt | 4 + dts/Bindings/arm/mvebu-cpu-config.txt | 20 ---- dts/Bindings/arm/mvebu-system-controller.txt | 18 ---- dts/Bindings/arm/nxp/lpc32xx.txt | 8 ++ dts/Bindings/arm/omap/omap.txt | 2 +- dts/Bindings/arm/pmu.txt | 11 +++ dts/Bindings/arm/qcom.txt | 51 ++++++++++ dts/Bindings/arm/sunxi.txt | 1 + 46 files changed, 692 insertions(+), 509 deletions(-) create mode 100644 dts/Bindings/arm/altera/socfpga-eccmgr.txt delete mode 100644 dts/Bindings/arm/armada-370-xp-pmsu.txt delete mode 100644 dts/Bindings/arm/armada-370-xp.txt delete mode 100644 dts/Bindings/arm/armada-375.txt delete mode 100644 dts/Bindings/arm/armada-380-mpcore-soc-ctrl.txt delete mode 100644 dts/Bindings/arm/armada-38x.txt delete mode 100644 dts/Bindings/arm/armada-39x.txt delete mode 100644 dts/Bindings/arm/armada-cpu-reset.txt create mode 100644 dts/Bindings/arm/axis.txt create mode 100644 dts/Bindings/arm/bcm/brcm,vulcan-soc.txt delete mode 100644 dts/Bindings/arm/coherency-fabric.txt delete mode 100644 dts/Bindings/arm/kirkwood.txt delete mode 100644 dts/Bindings/arm/lpc32xx.txt delete mode 100644 dts/Bindings/arm/marvell,berlin.txt delete mode 100644 dts/Bindings/arm/marvell,dove.txt delete mode 100644 dts/Bindings/arm/marvell,kirkwood.txt create mode 100644 dts/Bindings/arm/marvell/armada-370-xp-pmsu.txt create mode 100644 dts/Bindings/arm/marvell/armada-370-xp.txt create mode 100644 dts/Bindings/arm/marvell/armada-375.txt create mode 100644 dts/Bindings/arm/marvell/armada-37xx.txt create mode 100644 dts/Bindings/arm/marvell/armada-380-mpcore-soc-ctrl.txt create mode 100644 dts/Bindings/arm/marvell/armada-38x.txt create mode 100644 dts/Bindings/arm/marvell/armada-39x.txt create mode 100644 dts/Bindings/arm/marvell/armada-7k-8k.txt create mode 100644 dts/Bindings/arm/marvell/armada-cpu-reset.txt create mode 100644 dts/Bindings/arm/marvell/coherency-fabric.txt create mode 100644 dts/Bindings/arm/marvell/kirkwood.txt create mode 100644 dts/Bindings/arm/marvell/marvell,berlin.txt create mode 100644 dts/Bindings/arm/marvell/marvell,dove.txt create mode 100644 dts/Bindings/arm/marvell/marvell,kirkwood.txt create mode 100644 dts/Bindings/arm/marvell/mvebu-cpu-config.txt create mode 100644 dts/Bindings/arm/marvell/mvebu-system-controller.txt delete mode 100644 dts/Bindings/arm/mvebu-cpu-config.txt delete mode 100644 dts/Bindings/arm/mvebu-system-controller.txt create mode 100644 dts/Bindings/arm/nxp/lpc32xx.txt create mode 100644 dts/Bindings/arm/qcom.txt (limited to 'dts/Bindings/arm') diff --git a/dts/Bindings/arm/altera/socfpga-eccmgr.txt b/dts/Bindings/arm/altera/socfpga-eccmgr.txt new file mode 100644 index 0000000000..885f93d14e --- /dev/null +++ b/dts/Bindings/arm/altera/socfpga-eccmgr.txt @@ -0,0 +1,49 @@ +Altera SoCFPGA ECC Manager +This driver uses the EDAC framework to implement the SOCFPGA ECC Manager. +The ECC Manager counts and corrects single bit errors and counts/handles +double bit errors which are uncorrectable. + +Required Properties: +- compatible : Should be "altr,socfpga-ecc-manager" +- #address-cells: must be 1 +- #size-cells: must be 1 +- ranges : standard definition, should translate from local addresses + +Subcomponents: + +L2 Cache ECC +Required Properties: +- compatible : Should be "altr,socfpga-l2-ecc" +- reg : Address and size for ECC error interrupt clear registers. +- interrupts : Should be single bit error interrupt, then double bit error + interrupt. Note the rising edge type. + +On Chip RAM ECC +Required Properties: +- compatible : Should be "altr,socfpga-ocram-ecc" +- reg : Address and size for ECC error interrupt clear registers. +- iram : phandle to On-Chip RAM definition. +- interrupts : Should be single bit error interrupt, then double bit error + interrupt. Note the rising edge type. + +Example: + + eccmgr: eccmgr@ffd08140 { + compatible = "altr,socfpga-ecc-manager"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + l2-ecc@ffd08140 { + compatible = "altr,socfpga-l2-ecc"; + reg = <0xffd08140 0x4>; + interrupts = <0 36 1>, <0 37 1>; + }; + + ocram-ecc@ffd08144 { + compatible = "altr,socfpga-ocram-ecc"; + reg = <0xffd08144 0x4>; + iram = <&ocram>; + interrupts = <0 178 1>, <0 179 1>; + }; + }; diff --git a/dts/Bindings/arm/amlogic.txt b/dts/Bindings/arm/amlogic.txt index 1dfee20eee..8a5122ab19 100644 --- a/dts/Bindings/arm/amlogic.txt +++ b/dts/Bindings/arm/amlogic.txt @@ -13,8 +13,15 @@ Boards with the Amlogic Meson8b SoC shall have the following properties: Required root node property: compatible: "amlogic,meson8b"; +Boards with the Amlogic Meson GXBaby SoC shall have the following properties: + Required root node property: + compatible: "amlogic,meson-gxbb"; + Board compatible values: - "geniatech,atv1200" (Meson6) - "minix,neo-x8" (Meson8) - "tronfy,mxq" (Meson8b) - "hardkernel,odroid-c1" (Meson8b) + - "tronsmart,vega-s95-pro", "tronsmart,vega-s95" (Meson gxbb) + - "tronsmart,vega-s95-meta", "tronsmart,vega-s95" (Meson gxbb) + - "tronsmart,vega-s95-telos", "tronsmart,vega-s95" (Meson gxbb) diff --git a/dts/Bindings/arm/arm-boards b/dts/Bindings/arm/arm-boards index 1a709970e7..0226bc2cc1 100644 --- a/dts/Bindings/arm/arm-boards +++ b/dts/Bindings/arm/arm-boards @@ -123,7 +123,9 @@ Required nodes: - syscon: some subnode of the RealView SoC node must be a system controller node pointing to the control registers, - with the compatible string set to one of these tuples: + with the compatible string set to one of these: + "arm,realview-eb11mp-revb-syscon", "arm,realview-eb-syscon", "syscon" + "arm,realview-eb11mp-revc-syscon", "arm,realview-eb-syscon", "syscon" "arm,realview-eb-syscon", "syscon" "arm,realview-pb1176-syscon", "syscon" "arm,realview-pb11mp-syscon", "syscon" @@ -180,6 +182,7 @@ described under the RS1 memory mapping. Required properties (in root node): compatible = "arm,juno"; /* For Juno r0 board */ compatible = "arm,juno-r1"; /* For Juno r1 board */ + compatible = "arm,juno-r2"; /* For Juno r2 board */ Required nodes: The description for the board must include: diff --git a/dts/Bindings/arm/armada-370-xp-pmsu.txt b/dts/Bindings/arm/armada-370-xp-pmsu.txt deleted file mode 100644 index 26799ef562..0000000000 --- a/dts/Bindings/arm/armada-370-xp-pmsu.txt +++ /dev/null @@ -1,21 +0,0 @@ -Power Management Service Unit(PMSU) ------------------------------------ -Available on Marvell SOCs: Armada 370, Armada 38x and Armada XP - -Required properties: - -- compatible: should be one of: - - "marvell,armada-370-pmsu" for Armada 370 or Armada XP - - "marvell,armada-380-pmsu" for Armada 38x - - "marvell,armada-370-xp-pmsu" was used for Armada 370/XP but is now - deprecated and will be removed - -- reg: Should contain PMSU registers location and length. - -Example: - -armada-370-xp-pmsu@22000 { - compatible = "marvell,armada-370-pmsu"; - reg = <0x22000 0x1000>; -}; - diff --git a/dts/Bindings/arm/armada-370-xp.txt b/dts/Bindings/arm/armada-370-xp.txt deleted file mode 100644 index c6ed90ea6e..0000000000 --- a/dts/Bindings/arm/armada-370-xp.txt +++ /dev/null @@ -1,24 +0,0 @@ -Marvell Armada 370 and Armada XP Platforms Device Tree Bindings ---------------------------------------------------------------- - -Boards with a SoC of the Marvell Armada 370 and Armada XP families -shall have the following property: - -Required root node property: - -compatible: must contain "marvell,armada-370-xp" - -In addition, boards using the Marvell Armada 370 SoC shall have the -following property: - -Required root node property: - -compatible: must contain "marvell,armada370" - -In addition, boards using the Marvell Armada XP SoC shall have the -following property: - -Required root node property: - -compatible: must contain "marvell,armadaxp" - diff --git a/dts/Bindings/arm/armada-375.txt b/dts/Bindings/arm/armada-375.txt deleted file mode 100644 index 867d0b80cb..0000000000 --- a/dts/Bindings/arm/armada-375.txt +++ /dev/null @@ -1,9 +0,0 @@ -Marvell Armada 375 Platforms Device Tree Bindings -------------------------------------------------- - -Boards with a SoC of the Marvell Armada 375 family shall have the -following property: - -Required root node property: - -compatible: must contain "marvell,armada375" diff --git a/dts/Bindings/arm/armada-380-mpcore-soc-ctrl.txt b/dts/Bindings/arm/armada-380-mpcore-soc-ctrl.txt deleted file mode 100644 index 8781073029..0000000000 --- a/dts/Bindings/arm/armada-380-mpcore-soc-ctrl.txt +++ /dev/null @@ -1,14 +0,0 @@ -Marvell Armada 38x CA9 MPcore SoC Controller -============================================ - -Required properties: - -- compatible: Should be "marvell,armada-380-mpcore-soc-ctrl". - -- reg: should be the register base and length as documented in the - datasheet for the CA9 MPcore SoC Control registers - -mpcore-soc-ctrl@20d20 { - compatible = "marvell,armada-380-mpcore-soc-ctrl"; - reg = <0x20d20 0x6c>; -}; diff --git a/dts/Bindings/arm/armada-38x.txt b/dts/Bindings/arm/armada-38x.txt deleted file mode 100644 index 202953f188..0000000000 --- a/dts/Bindings/arm/armada-38x.txt +++ /dev/null @@ -1,27 +0,0 @@ -Marvell Armada 38x Platforms Device Tree Bindings -------------------------------------------------- - -Boards with a SoC of the Marvell Armada 38x family shall have the -following property: - -Required root node property: - - - compatible: must contain "marvell,armada380" - -In addition, boards using the Marvell Armada 385 SoC shall have the -following property before the previous one: - -Required root node property: - -compatible: must contain "marvell,armada385" - -In addition, boards using the Marvell Armada 388 SoC shall have the -following property before the previous one: - -Required root node property: - -compatible: must contain "marvell,armada388" - -Example: - -compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380"; diff --git a/dts/Bindings/arm/armada-39x.txt b/dts/Bindings/arm/armada-39x.txt deleted file mode 100644 index 53d4ff9ea8..0000000000 --- a/dts/Bindings/arm/armada-39x.txt +++ /dev/null @@ -1,20 +0,0 @@ -Marvell Armada 39x Platforms Device Tree Bindings -------------------------------------------------- - -Boards with a SoC of the Marvell Armada 39x family shall have the -following property: - -Required root node property: - - - compatible: must contain "marvell,armada390" - -In addition, boards using the Marvell Armada 398 SoC shall have the -following property before the previous one: - -Required root node property: - -compatible: must contain "marvell,armada398" - -Example: - -compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390"; diff --git a/dts/Bindings/arm/armada-cpu-reset.txt b/dts/Bindings/arm/armada-cpu-reset.txt deleted file mode 100644 index b63a7b6ab9..0000000000 --- a/dts/Bindings/arm/armada-cpu-reset.txt +++ /dev/null @@ -1,14 +0,0 @@ -Marvell Armada CPU reset controller -=================================== - -Required properties: - -- compatible: Should be "marvell,armada-370-cpu-reset". - -- reg: should be register base and length as documented in the - datasheet for the CPU reset registers - -cpurst: cpurst@20800 { - compatible = "marvell,armada-370-cpu-reset"; - reg = <0x20800 0x20>; -}; diff --git a/dts/Bindings/arm/axis.txt b/dts/Bindings/arm/axis.txt new file mode 100644 index 0000000000..ae345e1c8d --- /dev/null +++ b/dts/Bindings/arm/axis.txt @@ -0,0 +1,29 @@ +Axis Communications AB +ARTPEC series SoC Device Tree Bindings + +ARTPEC-6 ARM SoC +================ + +Required root node properties: +- compatible = "axis,artpec6"; + +ARTPEC-6 System Controller +-------------------------- + +The ARTPEC-6 has a system controller with mixed functions controlling DMA, PCIe +and resets. + +Required properties: +- compatible: "axis,artpec6-syscon", "syscon" +- reg: Address and length of the register bank. + +Example: + syscon { + compatible = "axis,artpec6-syscon", "syscon"; + reg = <0xf8000000 0x48>; + }; + +ARTPEC-6 Development board: +--------------------------- +Required root node properties: +- compatible = "axis,artpec6-dev-board", "axis,artpec6"; diff --git a/dts/Bindings/arm/bcm/brcm,vulcan-soc.txt b/dts/Bindings/arm/bcm/brcm,vulcan-soc.txt new file mode 100644 index 0000000000..223ed3471c --- /dev/null +++ b/dts/Bindings/arm/bcm/brcm,vulcan-soc.txt @@ -0,0 +1,10 @@ +Broadcom Vulcan device tree bindings +------------------------------------ + +Boards with Broadcom Vulcan shall have the following root property: + +Broadcom Vulcan Evaluation Board: + compatible = "brcm,vulcan-eval", "brcm,vulcan-soc"; + +Generic Vulcan board: + compatible = "brcm,vulcan-soc"; diff --git a/dts/Bindings/arm/cci.txt b/dts/Bindings/arm/cci.txt index aef1d200a9..a1a5a7ecc2 100644 --- a/dts/Bindings/arm/cci.txt +++ b/dts/Bindings/arm/cci.txt @@ -34,6 +34,7 @@ specific to ARM. Definition: must contain one of the following: "arm,cci-400" "arm,cci-500" + "arm,cci-550" - reg Usage: required @@ -101,6 +102,7 @@ specific to ARM. "arm,cci-400-pmu" - DEPRECATED, permitted only where OS has secure acces to CCI registers "arm,cci-500-pmu,r0" + "arm,cci-550-pmu,r0" - reg: Usage: required Value type: Integer cells. A register entry, expressed diff --git a/dts/Bindings/arm/coherency-fabric.txt b/dts/Bindings/arm/coherency-fabric.txt deleted file mode 100644 index 9b5c3f620e..0000000000 --- a/dts/Bindings/arm/coherency-fabric.txt +++ /dev/null @@ -1,48 +0,0 @@ -Coherency fabric ----------------- -Available on Marvell SOCs: Armada 370, Armada 375, Armada 38x and Armada XP - -Required properties: - -- compatible: the possible values are: - - * "marvell,coherency-fabric", to be used for the coherency fabric of - the Armada 370 and Armada XP. - - * "marvell,armada-375-coherency-fabric", for the Armada 375 coherency - fabric. - - * "marvell,armada-380-coherency-fabric", for the Armada 38x coherency - fabric. - -- reg: Should contain coherency fabric registers location and - length. - - * For "marvell,coherency-fabric", the first pair for the coherency - fabric registers, second pair for the per-CPU fabric registers. - - * For "marvell,armada-375-coherency-fabric", only one pair is needed - for the per-CPU fabric registers. - - * For "marvell,armada-380-coherency-fabric", only one pair is needed - for the per-CPU fabric registers. - -Optional properties: - -- broken-idle: boolean to set when the Idle mode is not supported by the - hardware. - -Examples: - -coherency-fabric@d0020200 { - compatible = "marvell,coherency-fabric"; - reg = <0xd0020200 0xb0>, - <0xd0021810 0x1c>; - -}; - -coherency-fabric@21810 { - compatible = "marvell,armada-375-coherency-fabric"; - reg = <0x21810 0x1c>; -}; - diff --git a/dts/Bindings/arm/cpus.txt b/dts/Bindings/arm/cpus.txt index ae9be074d0..ccc62f1453 100644 --- a/dts/Bindings/arm/cpus.txt +++ b/dts/Bindings/arm/cpus.txt @@ -167,6 +167,7 @@ nodes to be present and contain the properties described below. "arm,cortex-r5" "arm,cortex-r7" "brcm,brahma-b15" + "brcm,vulcan" "cavium,thunder" "faraday,fa526" "intel,sa110" @@ -178,6 +179,7 @@ nodes to be present and contain the properties described below. "marvell,sheeva-v5" "nvidia,tegra132-denver" "qcom,krait" + "qcom,kryo" "qcom,scorpion" - enable-method Value type: @@ -250,7 +252,7 @@ nodes to be present and contain the properties described below. Usage: optional Value type: Definition: A u32 value that represents the running time dynamic - power coefficient in units of mW/MHz/uVolt^2. The + power coefficient in units of mW/MHz/uV^2. The coefficient can either be calculated from power measurements or derived by analysis. diff --git a/dts/Bindings/arm/fw-cfg.txt b/dts/Bindings/arm/fw-cfg.txt index 953fb640d9..fd54e1db21 100644 --- a/dts/Bindings/arm/fw-cfg.txt +++ b/dts/Bindings/arm/fw-cfg.txt @@ -11,43 +11,9 @@ QEMU exposes the control and data register to ARM guests as memory mapped registers; their location is communicated to the guest's UEFI firmware in the DTB that QEMU places at the bottom of the guest's DRAM. -The guest writes a selector value (a key) to the selector register, and then -can read the corresponding data (produced by QEMU) via the data register. If -the selected entry is writable, the guest can rewrite it through the data -register. +The authoritative guest-side hardware interface documentation to the fw_cfg +device can be found in "docs/specs/fw_cfg.txt" in the QEMU source tree. -The selector register takes keys in big endian byte order. - -The data register allows accesses with 8, 16, 32 and 64-bit width (only at -offset 0 of the register). Accesses larger than a byte are interpreted as -arrays, bundled together only for better performance. The bytes constituting -such a word, in increasing address order, correspond to the bytes that would -have been transferred by byte-wide accesses in chronological order. - -The interface allows guest firmware to download various parameters and blobs -that affect how the firmware works and what tables it installs for the guest -OS. For example, boot order of devices, ACPI tables, SMBIOS tables, kernel and -initrd images for direct kernel booting, virtual machine UUID, SMP information, -virtual NUMA topology, and so on. - -The authoritative registry of the valid selector values and their meanings is -the QEMU source code; the structure of the data blobs corresponding to the -individual key values is also defined in the QEMU source code. - -The presence of the registers can be verified by selecting the "signature" blob -with key 0x0000, and reading four bytes from the data register. The returned -signature is "QEMU". - -The outermost protocol (involving the write / read sequences of the control and -data registers) is expected to be versioned, and/or described by feature bits. -The interface revision / feature bitmap can be retrieved with key 0x0001. The -blob to be read from the data register has size 4, and it is to be interpreted -as a uint32_t value in little endian byte order. The current value -(corresponding to the above outer protocol) is zero. - -The guest kernel is not expected to use these registers (although it is -certainly allowed to); the device tree bindings are documented here because -this is where device tree bindings reside in general. Required properties: diff --git a/dts/Bindings/arm/keystone/keystone.txt b/dts/Bindings/arm/keystone/keystone.txt index 3090a8a008..48f6703a28 100644 --- a/dts/Bindings/arm/keystone/keystone.txt +++ b/dts/Bindings/arm/keystone/keystone.txt @@ -22,6 +22,8 @@ SoCs: compatible = "ti,k2l", "ti,keystone" - Keystone 2 Edison compatible = "ti,k2e", "ti,keystone" +- K2G + compatible = "ti,k2g", "ti,keystone" Boards: - Keystone 2 Hawking/Kepler EVM @@ -32,3 +34,6 @@ Boards: - Keystone 2 Edison EVM compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone" + +- K2G EVM + compatible = "ti,k2g-evm", "ti,k2g", "ti-keystone" diff --git a/dts/Bindings/arm/kirkwood.txt b/dts/Bindings/arm/kirkwood.txt deleted file mode 100644 index 98cce9a653..0000000000 --- a/dts/Bindings/arm/kirkwood.txt +++ /dev/null @@ -1,27 +0,0 @@ -Marvell Kirkwood Platforms Device Tree Bindings ------------------------------------------------ - -Boards with a SoC of the Marvell Kirkwood -shall have the following property: - -Required root node property: - -compatible: must contain "marvell,kirkwood"; - -In order to support the kirkwood cpufreq driver, there must be a node -cpus/cpu@0 with three clocks, "cpu_clk", "ddrclk" and "powersave", -where the "powersave" clock is a gating clock used to switch the CPU -between the "cpu_clk" and the "ddrclk". - -Example: - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "marvell,sheeva-88SV131"; - clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>; - clock-names = "cpu_clk", "ddrclk", "powersave"; - }; diff --git a/dts/Bindings/arm/lpc32xx.txt b/dts/Bindings/arm/lpc32xx.txt deleted file mode 100644 index 56ec8ddc4a..0000000000 --- a/dts/Bindings/arm/lpc32xx.txt +++ /dev/null @@ -1,8 +0,0 @@ -NXP LPC32xx Platforms Device Tree Bindings ------------------------------------------- - -Boards with the NXP LPC32xx SoC shall have the following properties: - -Required root node property: - -compatible: must be "nxp,lpc3220", "nxp,lpc3230", "nxp,lpc3240" or "nxp,lpc3250" diff --git a/dts/Bindings/arm/marvell,berlin.txt b/dts/Bindings/arm/marvell,berlin.txt deleted file mode 100644 index 3bab18409b..0000000000 --- a/dts/Bindings/arm/marvell,berlin.txt +++ /dev/null @@ -1,96 +0,0 @@ -Marvell Berlin SoC Family Device Tree Bindings ---------------------------------------------------------------- - -Work in progress statement: - -Device tree files and bindings applying to Marvell Berlin SoCs and boards are -considered "unstable". Any Marvell Berlin device tree binding may change at any -time. Be sure to use a device tree binary and a kernel image generated from the -same source tree. - -Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a -stable binding/ABI. - ---------------------------------------------------------------- - -Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500 -shall have the following properties: - -* Required root node properties: -compatible: must contain "marvell,berlin" - -In addition, the above compatible shall be extended with the specific -SoC and board used. Currently known SoC compatibles are: - "marvell,berlin2" for Marvell Armada 1500 (BG2, 88DE3100), - "marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005) - "marvell,berlin2ct" for Marvell Armada ? (BG2CT, 88DE????) - "marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114) - "marvell,berlin3" for Marvell Armada ? (BG3, 88DE????) - -* Example: - -/ { - model = "Sony NSZ-GS7"; - compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin"; - - ... -} - -* Marvell Berlin CPU control bindings - -CPU control register allows various operations on CPUs, like resetting them -independently. - -Required properties: -- compatible: should be "marvell,berlin-cpu-ctrl" -- reg: address and length of the register set - -Example: - -cpu-ctrl@f7dd0000 { - compatible = "marvell,berlin-cpu-ctrl"; - reg = <0xf7dd0000 0x10000>; -}; - -* Marvell Berlin2 chip control binding - -Marvell Berlin SoCs have a chip control register set providing several -individual registers dealing with pinmux, padmux, clock, reset, and secondary -CPU boot address. Unfortunately, the individual registers are spread among the -chip control registers, so there should be a single DT node only providing the -different functions which are described below. - -Required properties: -- compatible: - * the first and second values must be: - "simple-mfd", "syscon" -- reg: address and length of following register sets for - BG2/BG2CD: chip control register set - BG2Q: chip control register set and cpu pll registers - -* Marvell Berlin2 system control binding - -Marvell Berlin SoCs have a system control register set providing several -individual registers dealing with pinmux, padmux, and reset. - -Required properties: -- compatible: - * the first and second values must be: - "simple-mfd", "syscon" -- reg: address and length of the system control register set - -Example: - -chip: chip-control@ea0000 { - compatible = "simple-mfd", "syscon"; - reg = <0xea0000 0x400>; - - /* sub-device nodes */ -}; - -sysctrl: system-controller@d000 { - compatible = "simple-mfd", "syscon"; - reg = <0xd000 0x100>; - - /* sub-device nodes */ -}; diff --git a/dts/Bindings/arm/marvell,dove.txt b/dts/Bindings/arm/marvell,dove.txt deleted file mode 100644 index aaaf64c56e..0000000000 --- a/dts/Bindings/arm/marvell,dove.txt +++ /dev/null @@ -1,22 +0,0 @@ -Marvell Dove Platforms Device Tree Bindings ------------------------------------------------ - -Boards with a Marvell Dove SoC shall have the following properties: - -Required root node property: -- compatible: must contain "marvell,dove"; - -* Global Configuration registers - -Global Configuration registers of Dove SoC are shared by a syscon node. - -Required properties: -- compatible: must contain "marvell,dove-global-config" and "syscon". -- reg: base address and size of the Global Configuration registers. - -Example: - -gconf: global-config@e802c { - compatible = "marvell,dove-global-config", "syscon"; - reg = <0xe802c 0x14>; -}; diff --git a/dts/Bindings/arm/marvell,kirkwood.txt b/dts/Bindings/arm/marvell,kirkwood.txt deleted file mode 100644 index ab0c9cdf38..0000000000 --- a/dts/Bindings/arm/marvell,kirkwood.txt +++ /dev/null @@ -1,102 +0,0 @@ -Marvell Kirkwood SoC Family Device Tree Bindings ------------------------------------------------- - -Boards with a SoC of the Marvell Kirkwook family, eg 88f6281 - -* Required root node properties: -compatible: must contain "marvell,kirkwood" - -In addition, the above compatible shall be extended with the specific -SoC. Currently known SoC compatibles are: - -"marvell,kirkwood-88f6192" -"marvell,kirkwood-88f6281" -"marvell,kirkwood-88f6282" -"marvell,kirkwood-88f6283" -"marvell,kirkwood-88f6702" -"marvell,kirkwood-98DX4122" - -And in addition, the compatible shall be extended with the specific -board. Currently known boards are: - -"buffalo,lschlv2" -"buffalo,lswvl" -"buffalo,lswxl" -"buffalo,lsxhl" -"buffalo,lsxl" -"cloudengines,pogo02" -"cloudengines,pogoplugv4" -"dlink,dns-320" -"dlink,dns-320-a1" -"dlink,dns-325" -"dlink,dns-325-a1" -"dlink,dns-kirkwood" -"excito,b3" -"globalscale,dreamplug-003-ds2001" -"globalscale,guruplug" -"globalscale,guruplug-server-plus" -"globalscale,sheevaplug" -"globalscale,sheevaplug" -"globalscale,sheevaplug-esata" -"globalscale,sheevaplug-esata-rev13" -"iom,iconnect" -"iom,iconnect-1.1" -"iom,ix2-200" -"keymile,km_kirkwood" -"lacie,cloudbox" -"lacie,inetspace_v2" -"lacie,laplug" -"lacie,nas2big" -"lacie,netspace_lite_v2" -"lacie,netspace_max_v2" -"lacie,netspace_mini_v2" -"lacie,netspace_v2" -"marvell,db-88f6281-bp" -"marvell,db-88f6282-bp" -"marvell,mv88f6281gtw-ge" -"marvell,rd88f6281" -"marvell,rd88f6281" -"marvell,rd88f6281-a0" -"marvell,rd88f6281-a1" -"mpl,cec4" -"mpl,cec4-10" -"netgear,readynas" -"netgear,readynas" -"netgear,readynas-duo-v2" -"netgear,readynas-nv+-v2" -"plathome,openblocks-a6" -"plathome,openblocks-a7" -"raidsonic,ib-nas6210" -"raidsonic,ib-nas6210-b" -"raidsonic,ib-nas6220" -"raidsonic,ib-nas6220-b" -"raidsonic,ib-nas62x0" -"seagate,dockstar" -"seagate,goflexnet" -"synology,ds109" -"synology,ds110jv10" -"synology,ds110jv20" -"synology,ds110jv30" -"synology,ds111" -"synology,ds209" -"synology,ds210jv10" -"synology,ds210jv20" -"synology,ds212" -"synology,ds212jv10" -"synology,ds212jv20" -"synology,ds212pv10" -"synology,ds409" -"synology,ds409slim" -"synology,ds410j" -"synology,ds411" -"synology,ds411j" -"synology,ds411slim" -"synology,ds413jv10" -"synology,rs212" -"synology,rs409" -"synology,rs411" -"synology,rs812" -"usi,topkick" -"usi,topkick-1281P2" -"zyxel,nsa310" -"zyxel,nsa310a" diff --git a/dts/Bindings/arm/marvell/armada-370-xp-pmsu.txt b/dts/Bindings/arm/marvell/armada-370-xp-pmsu.txt new file mode 100644 index 0000000000..26799ef562 --- /dev/null +++ b/dts/Bindings/arm/marvell/armada-370-xp-pmsu.txt @@ -0,0 +1,21 @@ +Power Management Service Unit(PMSU) +----------------------------------- +Available on Marvell SOCs: Armada 370, Armada 38x and Armada XP + +Required properties: + +- compatible: should be one of: + - "marvell,armada-370-pmsu" for Armada 370 or Armada XP + - "marvell,armada-380-pmsu" for Armada 38x + - "marvell,armada-370-xp-pmsu" was used for Armada 370/XP but is now + deprecated and will be removed + +- reg: Should contain PMSU registers location and length. + +Example: + +armada-370-xp-pmsu@22000 { + compatible = "marvell,armada-370-pmsu"; + reg = <0x22000 0x1000>; +}; + diff --git a/dts/Bindings/arm/marvell/armada-370-xp.txt b/dts/Bindings/arm/marvell/armada-370-xp.txt new file mode 100644 index 0000000000..c6ed90ea6e --- /dev/null +++ b/dts/Bindings/arm/marvell/armada-370-xp.txt @@ -0,0 +1,24 @@ +Marvell Armada 370 and Armada XP Platforms Device Tree Bindings +--------------------------------------------------------------- + +Boards with a SoC of the Marvell Armada 370 and Armada XP families +shall have the following property: + +Required root node property: + +compatible: must contain "marvell,armada-370-xp" + +In addition, boards using the Marvell Armada 370 SoC shall have the +following property: + +Required root node property: + +compatible: must contain "marvell,armada370" + +In addition, boards using the Marvell Armada XP SoC shall have the +following property: + +Required root node property: + +compatible: must contain "marvell,armadaxp" + diff --git a/dts/Bindings/arm/marvell/armada-375.txt b/dts/Bindings/arm/marvell/armada-375.txt new file mode 100644 index 0000000000..867d0b80cb --- /dev/null +++ b/dts/Bindings/arm/marvell/armada-375.txt @@ -0,0 +1,9 @@ +Marvell Armada 375 Platforms Device Tree Bindings +------------------------------------------------- + +Boards with a SoC of the Marvell Armada 375 family shall have the +following property: + +Required root node property: + +compatible: must contain "marvell,armada375" diff --git a/dts/Bindings/arm/marvell/armada-37xx.txt b/dts/Bindings/arm/marvell/armada-37xx.txt new file mode 100644 index 0000000000..51336e5fc7 --- /dev/null +++ b/dts/Bindings/arm/marvell/armada-37xx.txt @@ -0,0 +1,16 @@ +Marvell Armada 37xx Platforms Device Tree Bindings +-------------------------------------------------- + +Boards using a SoC of the Marvell Armada 37xx family must carry the +following root node property: + + - compatible: must contain "marvell,armada3710" + +In addition, boards using the Marvell Armada 3720 SoC shall have the +following property before the previous one: + + - compatible: must contain "marvell,armada3720" + +Example: + +compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710"; diff --git a/dts/Bindings/arm/marvell/armada-380-mpcore-soc-ctrl.txt b/dts/Bindings/arm/marvell/armada-380-mpcore-soc-ctrl.txt new file mode 100644 index 0000000000..8781073029 --- /dev/null +++ b/dts/Bindings/arm/marvell/armada-380-mpcore-soc-ctrl.txt @@ -0,0 +1,14 @@ +Marvell Armada 38x CA9 MPcore SoC Controller +============================================ + +Required properties: + +- compatible: Should be "marvell,armada-380-mpcore-soc-ctrl". + +- reg: should be the register base and length as documented in the + datasheet for the CA9 MPcore SoC Control registers + +mpcore-soc-ctrl@20d20 { + compatible = "marvell,armada-380-mpcore-soc-ctrl"; + reg = <0x20d20 0x6c>; +}; diff --git a/dts/Bindings/arm/marvell/armada-38x.txt b/dts/Bindings/arm/marvell/armada-38x.txt new file mode 100644 index 0000000000..202953f188 --- /dev/null +++ b/dts/Bindings/arm/marvell/armada-38x.txt @@ -0,0 +1,27 @@ +Marvell Armada 38x Platforms Device Tree Bindings +------------------------------------------------- + +Boards with a SoC of the Marvell Armada 38x family shall have the +following property: + +Required root node property: + + - compatible: must contain "marvell,armada380" + +In addition, boards using the Marvell Armada 385 SoC shall have the +following property before the previous one: + +Required root node property: + +compatible: must contain "marvell,armada385" + +In addition, boards using the Marvell Armada 388 SoC shall have the +following property before the previous one: + +Required root node property: + +compatible: must contain "marvell,armada388" + +Example: + +compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380"; diff --git a/dts/Bindings/arm/marvell/armada-39x.txt b/dts/Bindings/arm/marvell/armada-39x.txt new file mode 100644 index 0000000000..53d4ff9ea8 --- /dev/null +++ b/dts/Bindings/arm/marvell/armada-39x.txt @@ -0,0 +1,20 @@ +Marvell Armada 39x Platforms Device Tree Bindings +------------------------------------------------- + +Boards with a SoC of the Marvell Armada 39x family shall have the +following property: + +Required root node property: + + - compatible: must contain "marvell,armada390" + +In addition, boards using the Marvell Armada 398 SoC shall have the +following property before the previous one: + +Required root node property: + +compatible: must contain "marvell,armada398" + +Example: + +compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390"; diff --git a/dts/Bindings/arm/marvell/armada-7k-8k.txt b/dts/Bindings/arm/marvell/armada-7k-8k.txt new file mode 100644 index 0000000000..df98a9c82a --- /dev/null +++ b/dts/Bindings/arm/marvell/armada-7k-8k.txt @@ -0,0 +1,24 @@ +Marvell Armada 7K/8K Platforms Device Tree Bindings +--------------------------------------------------- + +Boards using a SoC of the Marvell Armada 7K or 8K families must carry +the following root node property: + + - compatible, with one of the following values: + + - "marvell,armada7020", "marvell,armada-ap806-dual", "marvell,armada-ap806" + when the SoC being used is the Armada 7020 + + - "marvell,armada7040", "marvell,armada-ap806-quad", "marvell,armada-ap806" + when the SoC being used is the Armada 7040 + + - "marvell,armada8020", "marvell,armada-ap806-dual", "marvell,armada-ap806" + when the SoC being used is the Armada 8020 + + - "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada-ap806" + when the SoC being used is the Armada 8040 + +Example: + +compatible = "marvell,armada7040-db", "marvell,armada7040", + "marvell,armada-ap806-quad", "marvell,armada-ap806"; diff --git a/dts/Bindings/arm/marvell/armada-cpu-reset.txt b/dts/Bindings/arm/marvell/armada-cpu-reset.txt new file mode 100644 index 0000000000..b63a7b6ab9 --- /dev/null +++ b/dts/Bindings/arm/marvell/armada-cpu-reset.txt @@ -0,0 +1,14 @@ +Marvell Armada CPU reset controller +=================================== + +Required properties: + +- compatible: Should be "marvell,armada-370-cpu-reset". + +- reg: should be register base and length as documented in the + datasheet for the CPU reset registers + +cpurst: cpurst@20800 { + compatible = "marvell,armada-370-cpu-reset"; + reg = <0x20800 0x20>; +}; diff --git a/dts/Bindings/arm/marvell/coherency-fabric.txt b/dts/Bindings/arm/marvell/coherency-fabric.txt new file mode 100644 index 0000000000..9b5c3f620e --- /dev/null +++ b/dts/Bindings/arm/marvell/coherency-fabric.txt @@ -0,0 +1,48 @@ +Coherency fabric +---------------- +Available on Marvell SOCs: Armada 370, Armada 375, Armada 38x and Armada XP + +Required properties: + +- compatible: the possible values are: + + * "marvell,coherency-fabric", to be used for the coherency fabric of + the Armada 370 and Armada XP. + + * "marvell,armada-375-coherency-fabric", for the Armada 375 coherency + fabric. + + * "marvell,armada-380-coherency-fabric", for the Armada 38x coherency + fabric. + +- reg: Should contain coherency fabric registers location and + length. + + * For "marvell,coherency-fabric", the first pair for the coherency + fabric registers, second pair for the per-CPU fabric registers. + + * For "marvell,armada-375-coherency-fabric", only one pair is needed + for the per-CPU fabric registers. + + * For "marvell,armada-380-coherency-fabric", only one pair is needed + for the per-CPU fabric registers. + +Optional properties: + +- broken-idle: boolean to set when the Idle mode is not supported by the + hardware. + +Examples: + +coherency-fabric@d0020200 { + compatible = "marvell,coherency-fabric"; + reg = <0xd0020200 0xb0>, + <0xd0021810 0x1c>; + +}; + +coherency-fabric@21810 { + compatible = "marvell,armada-375-coherency-fabric"; + reg = <0x21810 0x1c>; +}; + diff --git a/dts/Bindings/arm/marvell/kirkwood.txt b/dts/Bindings/arm/marvell/kirkwood.txt new file mode 100644 index 0000000000..98cce9a653 --- /dev/null +++ b/dts/Bindings/arm/marvell/kirkwood.txt @@ -0,0 +1,27 @@ +Marvell Kirkwood Platforms Device Tree Bindings +----------------------------------------------- + +Boards with a SoC of the Marvell Kirkwood +shall have the following property: + +Required root node property: + +compatible: must contain "marvell,kirkwood"; + +In order to support the kirkwood cpufreq driver, there must be a node +cpus/cpu@0 with three clocks, "cpu_clk", "ddrclk" and "powersave", +where the "powersave" clock is a gating clock used to switch the CPU +between the "cpu_clk" and the "ddrclk". + +Example: + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "marvell,sheeva-88SV131"; + clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>; + clock-names = "cpu_clk", "ddrclk", "powersave"; + }; diff --git a/dts/Bindings/arm/marvell/marvell,berlin.txt b/dts/Bindings/arm/marvell/marvell,berlin.txt new file mode 100644 index 0000000000..3bab18409b --- /dev/null +++ b/dts/Bindings/arm/marvell/marvell,berlin.txt @@ -0,0 +1,96 @@ +Marvell Berlin SoC Family Device Tree Bindings +--------------------------------------------------------------- + +Work in progress statement: + +Device tree files and bindings applying to Marvell Berlin SoCs and boards are +considered "unstable". Any Marvell Berlin device tree binding may change at any +time. Be sure to use a device tree binary and a kernel image generated from the +same source tree. + +Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a +stable binding/ABI. + +--------------------------------------------------------------- + +Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500 +shall have the following properties: + +* Required root node properties: +compatible: must contain "marvell,berlin" + +In addition, the above compatible shall be extended with the specific +SoC and board used. Currently known SoC compatibles are: + "marvell,berlin2" for Marvell Armada 1500 (BG2, 88DE3100), + "marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005) + "marvell,berlin2ct" for Marvell Armada ? (BG2CT, 88DE????) + "marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114) + "marvell,berlin3" for Marvell Armada ? (BG3, 88DE????) + +* Example: + +/ { + model = "Sony NSZ-GS7"; + compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin"; + + ... +} + +* Marvell Berlin CPU control bindings + +CPU control register allows various operations on CPUs, like resetting them +independently. + +Required properties: +- compatible: should be "marvell,berlin-cpu-ctrl" +- reg: address and length of the register set + +Example: + +cpu-ctrl@f7dd0000 { + compatible = "marvell,berlin-cpu-ctrl"; + reg = <0xf7dd0000 0x10000>; +}; + +* Marvell Berlin2 chip control binding + +Marvell Berlin SoCs have a chip control register set providing several +individual registers dealing with pinmux, padmux, clock, reset, and secondary +CPU boot address. Unfortunately, the individual registers are spread among the +chip control registers, so there should be a single DT node only providing the +different functions which are described below. + +Required properties: +- compatible: + * the first and second values must be: + "simple-mfd", "syscon" +- reg: address and length of following register sets for + BG2/BG2CD: chip control register set + BG2Q: chip control register set and cpu pll registers + +* Marvell Berlin2 system control binding + +Marvell Berlin SoCs have a system control register set providing several +individual registers dealing with pinmux, padmux, and reset. + +Required properties: +- compatible: + * the first and second values must be: + "simple-mfd", "syscon" +- reg: address and length of the system control register set + +Example: + +chip: chip-control@ea0000 { + compatible = "simple-mfd", "syscon"; + reg = <0xea0000 0x400>; + + /* sub-device nodes */ +}; + +sysctrl: system-controller@d000 { + compatible = "simple-mfd", "syscon"; + reg = <0xd000 0x100>; + + /* sub-device nodes */ +}; diff --git a/dts/Bindings/arm/marvell/marvell,dove.txt b/dts/Bindings/arm/marvell/marvell,dove.txt new file mode 100644 index 0000000000..aaaf64c56e --- /dev/null +++ b/dts/Bindings/arm/marvell/marvell,dove.txt @@ -0,0 +1,22 @@ +Marvell Dove Platforms Device Tree Bindings +----------------------------------------------- + +Boards with a Marvell Dove SoC shall have the following properties: + +Required root node property: +- compatible: must contain "marvell,dove"; + +* Global Configuration registers + +Global Configuration registers of Dove SoC are shared by a syscon node. + +Required properties: +- compatible: must contain "marvell,dove-global-config" and "syscon". +- reg: base address and size of the Global Configuration registers. + +Example: + +gconf: global-config@e802c { + compatible = "marvell,dove-global-config", "syscon"; + reg = <0xe802c 0x14>; +}; diff --git a/dts/Bindings/arm/marvell/marvell,kirkwood.txt b/dts/Bindings/arm/marvell/marvell,kirkwood.txt new file mode 100644 index 0000000000..7d28fe4bf6 --- /dev/null +++ b/dts/Bindings/arm/marvell/marvell,kirkwood.txt @@ -0,0 +1,105 @@ +Marvell Kirkwood SoC Family Device Tree Bindings +------------------------------------------------ + +Boards with a SoC of the Marvell Kirkwook family, eg 88f6281 + +* Required root node properties: +compatible: must contain "marvell,kirkwood" + +In addition, the above compatible shall be extended with the specific +SoC. Currently known SoC compatibles are: + +"marvell,kirkwood-88f6192" +"marvell,kirkwood-88f6281" +"marvell,kirkwood-88f6282" +"marvell,kirkwood-88f6283" +"marvell,kirkwood-88f6702" +"marvell,kirkwood-98DX4122" + +And in addition, the compatible shall be extended with the specific +board. Currently known boards are: + +"buffalo,linkstation-lsqvl" +"buffalo,linkstation-lsvl" +"buffalo,linkstation-lswsxl" +"buffalo,linkstation-lswxl" +"buffalo,linkstation-lswvl" +"buffalo,lschlv2" +"buffalo,lsxhl" +"buffalo,lsxl" +"cloudengines,pogo02" +"cloudengines,pogoplugv4" +"dlink,dns-320" +"dlink,dns-320-a1" +"dlink,dns-325" +"dlink,dns-325-a1" +"dlink,dns-kirkwood" +"excito,b3" +"globalscale,dreamplug-003-ds2001" +"globalscale,guruplug" +"globalscale,guruplug-server-plus" +"globalscale,sheevaplug" +"globalscale,sheevaplug" +"globalscale,sheevaplug-esata" +"globalscale,sheevaplug-esata-rev13" +"iom,iconnect" +"iom,iconnect-1.1" +"iom,ix2-200" +"keymile,km_kirkwood" +"lacie,cloudbox" +"lacie,inetspace_v2" +"lacie,laplug" +"lacie,nas2big" +"lacie,netspace_lite_v2" +"lacie,netspace_max_v2" +"lacie,netspace_mini_v2" +"lacie,netspace_v2" +"marvell,db-88f6281-bp" +"marvell,db-88f6282-bp" +"marvell,mv88f6281gtw-ge" +"marvell,rd88f6281" +"marvell,rd88f6281" +"marvell,rd88f6281-a0" +"marvell,rd88f6281-a1" +"mpl,cec4" +"mpl,cec4-10" +"netgear,readynas" +"netgear,readynas" +"netgear,readynas-duo-v2" +"netgear,readynas-nv+-v2" +"plathome,openblocks-a6" +"plathome,openblocks-a7" +"raidsonic,ib-nas6210" +"raidsonic,ib-nas6210-b" +"raidsonic,ib-nas6220" +"raidsonic,ib-nas6220-b" +"raidsonic,ib-nas62x0" +"seagate,dockstar" +"seagate,goflexnet" +"synology,ds109" +"synology,ds110jv10" +"synology,ds110jv20" +"synology,ds110jv30" +"synology,ds111" +"synology,ds209" +"synology,ds210jv10" +"synology,ds210jv20" +"synology,ds212" +"synology,ds212jv10" +"synology,ds212jv20" +"synology,ds212pv10" +"synology,ds409" +"synology,ds409slim" +"synology,ds410j" +"synology,ds411" +"synology,ds411j" +"synology,ds411slim" +"synology,ds413jv10" +"synology,rs212" +"synology,rs409" +"synology,rs411" +"synology,rs812" +"usi,topkick" +"usi,topkick-1281P2" +"zyxel,nsa310" +"zyxel,nsa310a" diff --git a/dts/Bindings/arm/marvell/mvebu-cpu-config.txt b/dts/Bindings/arm/marvell/mvebu-cpu-config.txt new file mode 100644 index 0000000000..2cdcd716da --- /dev/null +++ b/dts/Bindings/arm/marvell/mvebu-cpu-config.txt @@ -0,0 +1,20 @@ +MVEBU CPU Config registers +-------------------------- + +MVEBU (Marvell SOCs: Armada 370/XP) + +Required properties: + +- compatible: one of: + - "marvell,armada-370-cpu-config" + - "marvell,armada-xp-cpu-config" + +- reg: Should contain CPU config registers location and length, in + their per-CPU variant + +Example: + + cpu-config@21000 { + compatible = "marvell,armada-xp-cpu-config"; + reg = <0x21000 0x8>; + }; diff --git a/dts/Bindings/arm/marvell/mvebu-system-controller.txt b/dts/Bindings/arm/marvell/mvebu-system-controller.txt new file mode 100644 index 0000000000..d24ab2ebf8 --- /dev/null +++ b/dts/Bindings/arm/marvell/mvebu-system-controller.txt @@ -0,0 +1,18 @@ +MVEBU System Controller +----------------------- +MVEBU (Marvell SOCs: Armada 370/375/XP, Dove, mv78xx0, Kirkwood, Orion5x) + +Required properties: + +- compatible: one of: + - "marvell,orion-system-controller" + - "marvell,armada-370-xp-system-controller" + - "marvell,armada-375-system-controller" +- reg: Should contain system controller registers location and length. + +Example: + + system-controller@d0018200 { + compatible = "marvell,armada-370-xp-system-controller"; + reg = <0xd0018200 0x500>; + }; diff --git a/dts/Bindings/arm/mediatek.txt b/dts/Bindings/arm/mediatek.txt index 54f43bc2df..d9c2a37a40 100644 --- a/dts/Bindings/arm/mediatek.txt +++ b/dts/Bindings/arm/mediatek.txt @@ -11,6 +11,7 @@ compatible: Must contain one of "mediatek,mt6589" "mediatek,mt6592" "mediatek,mt6795" + "mediatek,mt7623" "mediatek,mt8127" "mediatek,mt8135" "mediatek,mt8173" @@ -33,6 +34,9 @@ Supported boards: - Evaluation board for MT6795(Helio X10): Required root node properties: - compatible = "mediatek,mt6795-evb", "mediatek,mt6795"; +- Evaluation board for MT7623: + Required root node properties: + - compatible = "mediatek,mt7623-evb", "mediatek,mt7623"; - MTK mt8127 tablet moose EVB: Required root node properties: - compatible = "mediatek,mt8127-moose", "mediatek,mt8127"; diff --git a/dts/Bindings/arm/mvebu-cpu-config.txt b/dts/Bindings/arm/mvebu-cpu-config.txt deleted file mode 100644 index 2cdcd716da..0000000000 --- a/dts/Bindings/arm/mvebu-cpu-config.txt +++ /dev/null @@ -1,20 +0,0 @@ -MVEBU CPU Config registers --------------------------- - -MVEBU (Marvell SOCs: Armada 370/XP) - -Required properties: - -- compatible: one of: - - "marvell,armada-370-cpu-config" - - "marvell,armada-xp-cpu-config" - -- reg: Should contain CPU config registers location and length, in - their per-CPU variant - -Example: - - cpu-config@21000 { - compatible = "marvell,armada-xp-cpu-config"; - reg = <0x21000 0x8>; - }; diff --git a/dts/Bindings/arm/mvebu-system-controller.txt b/dts/Bindings/arm/mvebu-system-controller.txt deleted file mode 100644 index d24ab2ebf8..0000000000 --- a/dts/Bindings/arm/mvebu-system-controller.txt +++ /dev/null @@ -1,18 +0,0 @@ -MVEBU System Controller ------------------------ -MVEBU (Marvell SOCs: Armada 370/375/XP, Dove, mv78xx0, Kirkwood, Orion5x) - -Required properties: - -- compatible: one of: - - "marvell,orion-system-controller" - - "marvell,armada-370-xp-system-controller" - - "marvell,armada-375-system-controller" -- reg: Should contain system controller registers location and length. - -Example: - - system-controller@d0018200 { - compatible = "marvell,armada-370-xp-system-controller"; - reg = <0xd0018200 0x500>; - }; diff --git a/dts/Bindings/arm/nxp/lpc32xx.txt b/dts/Bindings/arm/nxp/lpc32xx.txt new file mode 100644 index 0000000000..56ec8ddc4a --- /dev/null +++ b/dts/Bindings/arm/nxp/lpc32xx.txt @@ -0,0 +1,8 @@ +NXP LPC32xx Platforms Device Tree Bindings +------------------------------------------ + +Boards with the NXP LPC32xx SoC shall have the following properties: + +Required root node property: + +compatible: must be "nxp,lpc3220", "nxp,lpc3230", "nxp,lpc3240" or "nxp,lpc3250" diff --git a/dts/Bindings/arm/omap/omap.txt b/dts/Bindings/arm/omap/omap.txt index 66422d6631..21e71a5e86 100644 --- a/dts/Bindings/arm/omap/omap.txt +++ b/dts/Bindings/arm/omap/omap.txt @@ -155,7 +155,7 @@ Boards: compatible = "compulab,am437x-sbc-t43", "compulab,am437x-cm-t43", "ti,am4372", "ti,am43" - AM43x EPOS EVM - compatible = "ti,am43x-epos-evm", "ti,am4372", "ti,am43" + compatible = "ti,am43x-epos-evm", "ti,am43", "ti,am438x" - AM437x GP EVM compatible = "ti,am437x-gp-evm", "ti,am4372", "ti,am43" diff --git a/dts/Bindings/arm/pmu.txt b/dts/Bindings/arm/pmu.txt index 56518839f5..6eb73be943 100644 --- a/dts/Bindings/arm/pmu.txt +++ b/dts/Bindings/arm/pmu.txt @@ -25,6 +25,7 @@ Required properties: "qcom,scorpion-pmu" "qcom,scorpion-mp-pmu" "qcom,krait-pmu" + "cavium,thunder-pmu" - interrupts : 1 combined interrupt or 1 per core. If the interrupt is a per-cpu interrupt (PPI) then 1 interrupt should be specified. @@ -46,6 +47,16 @@ Optional properties: - qcom,no-pc-write : Indicates that this PMU doesn't support the 0xc and 0xd events. +- secure-reg-access : Indicates that the ARMv7 Secure Debug Enable Register + (SDER) is accessible. This will cause the driver to do + any setup required that is only possible in ARMv7 secure + state. If not present the ARMv7 SDER will not be touched, + which means the PMU may fail to operate unless external + code (bootloader or security monitor) has performed the + appropriate initialisation. Note that this property is + not valid for non-ARMv7 CPUs or ARMv7 CPUs booting Linux + in Non-secure state. + Example: pmu { diff --git a/dts/Bindings/arm/qcom.txt b/dts/Bindings/arm/qcom.txt new file mode 100644 index 0000000000..3e24518c66 --- /dev/null +++ b/dts/Bindings/arm/qcom.txt @@ -0,0 +1,51 @@ +QCOM device tree bindings +------------------------- + +Some qcom based bootloaders identify the dtb blob based on a set of +device properties like SoC and platform and revisions of those components. +To support this scheme, we encode this information into the board compatible +string. + +Each board must specify a top-level board compatible string with the following +format: + + compatible = "qcom,[-][-]-[/][-]" + +The 'SoC' and 'board' elements are required. All other elements are optional. + +The 'SoC' element must be one of the following strings: + + apq8016 + apq8074 + apq8084 + apq8096 + msm8916 + msm8974 + msm8996 + +The 'board' element must be one of the following strings: + + cdp + liquid + dragonboard + mtp + sbc + +The 'soc_version' and 'board_version' elements take the form of v. +where the minor number may be omitted when it's zero, i.e. v1.0 is the same +as v1. If all versions of the 'board_version' elements match, then a +wildcard '*' should be used, e.g. 'v*'. + +The 'foundry_id' and 'subtype' elements are one or more digits from 0 to 9. + +Examples: + + "qcom,msm8916-v1-cdp-pm8916-v2.1" + +A CDP board with an msm8916 SoC, version 1 paired with a pm8916 PMIC of version +2.1. + + "qcom,apq8074-v2.0-2-dragonboard/1-v0.1" + +A dragonboard board v0.1 of subtype 1 with an apq8074 SoC version 2, made in +foundry 2. diff --git a/dts/Bindings/arm/sunxi.txt b/dts/Bindings/arm/sunxi.txt index bb9b0faa91..7e79fcc36b 100644 --- a/dts/Bindings/arm/sunxi.txt +++ b/dts/Bindings/arm/sunxi.txt @@ -11,5 +11,6 @@ using one of the following compatible strings: allwinner,sun7i-a20 allwinner,sun8i-a23 allwinner,sun8i-a33 + allwinner,sun8i-a83t allwinner,sun8i-h3 allwinner,sun9i-a80 -- cgit v1.2.3