From 6ea3de1b8ce7a0154233bd75e77e6e44a525d0ef Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 5 Jan 2021 12:56:25 +0100 Subject: dts: update to v5.11-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/bus/allwinner,sun50i-a64-de2.yaml | 2 +- dts/Bindings/bus/baikal,bt1-axi.yaml | 2 +- dts/Bindings/bus/nvidia,tegra210-aconnect.txt | 44 -------------- dts/Bindings/bus/nvidia,tegra210-aconnect.yaml | 82 ++++++++++++++++++++++++++ 4 files changed, 84 insertions(+), 46 deletions(-) delete mode 100644 dts/Bindings/bus/nvidia,tegra210-aconnect.txt create mode 100644 dts/Bindings/bus/nvidia,tegra210-aconnect.yaml (limited to 'dts/Bindings/bus') diff --git a/dts/Bindings/bus/allwinner,sun50i-a64-de2.yaml b/dts/Bindings/bus/allwinner,sun50i-a64-de2.yaml index 0503651cd2..863a287ebc 100644 --- a/dts/Bindings/bus/allwinner,sun50i-a64-de2.yaml +++ b/dts/Bindings/bus/allwinner,sun50i-a64-de2.yaml @@ -34,7 +34,7 @@ properties: description: The SRAM that needs to be claimed to access the display engine bus. - $ref: /schemas/types.yaml#definitions/phandle-array + $ref: /schemas/types.yaml#/definitions/phandle-array maxItems: 1 ranges: true diff --git a/dts/Bindings/bus/baikal,bt1-axi.yaml b/dts/Bindings/bus/baikal,bt1-axi.yaml index 0bee469457..4ac78b44e4 100644 --- a/dts/Bindings/bus/baikal,bt1-axi.yaml +++ b/dts/Bindings/bus/baikal,bt1-axi.yaml @@ -46,7 +46,7 @@ properties: const: 1 syscon: - $ref: /schemas/types.yaml#definitions/phandle + $ref: /schemas/types.yaml#/definitions/phandle description: Phandle to the Baikal-T1 System Controller DT node interrupts: diff --git a/dts/Bindings/bus/nvidia,tegra210-aconnect.txt b/dts/Bindings/bus/nvidia,tegra210-aconnect.txt deleted file mode 100644 index 3108d03802..0000000000 --- a/dts/Bindings/bus/nvidia,tegra210-aconnect.txt +++ /dev/null @@ -1,44 +0,0 @@ -NVIDIA Tegra ACONNECT Bus - -The Tegra ACONNECT bus is an AXI switch which is used to connnect various -components inside the Audio Processing Engine (APE). All CPU accesses to -the APE subsystem go through the ACONNECT via an APB to AXI wrapper. - -Required properties: -- compatible: Must be "nvidia,tegra210-aconnect". -- clocks: Must contain the entries for the APE clock (TEGRA210_CLK_APE), - and APE interface clock (TEGRA210_CLK_APB2APE). -- clock-names: Must contain the names "ape" and "apb2ape" for the corresponding - 'clocks' entries. -- power-domains: Must contain a phandle that points to the audio powergate - (namely 'aud') for Tegra210. -- #address-cells: The number of cells used to represent physical base addresses - in the aconnect address space. Should be 1. -- #size-cells: The number of cells used to represent the size of an address - range in the aconnect address space. Should be 1. -- ranges: Mapping of the aconnect address space to the CPU address space. - -All devices accessed via the ACONNNECT are described by child-nodes. - -Example: - - aconnect@702c0000 { - compatible = "nvidia,tegra210-aconnect"; - clocks = <&tegra_car TEGRA210_CLK_APE>, - <&tegra_car TEGRA210_CLK_APB2APE>; - clock-names = "ape", "apb2ape"; - power-domains = <&pd_audio>; - - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; - - - child1 { - ... - }; - - child2 { - ... - }; - }; diff --git a/dts/Bindings/bus/nvidia,tegra210-aconnect.yaml b/dts/Bindings/bus/nvidia,tegra210-aconnect.yaml new file mode 100644 index 0000000000..7b1a08c62a --- /dev/null +++ b/dts/Bindings/bus/nvidia,tegra210-aconnect.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/nvidia,tegra210-aconnect.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra ACONNECT Bus + +description: | + The Tegra ACONNECT bus is an AXI switch which is used to connnect various + components inside the Audio Processing Engine (APE). All CPU accesses to + the APE subsystem go through the ACONNECT via an APB to AXI wrapper. All + devices accessed via the ACONNNECT are described by child-nodes. + +maintainers: + - Jon Hunter + +properties: + compatible: + oneOf: + - const: nvidia,tegra210-aconnect + - items: + - enum: + - nvidia,tegra186-aconnect + - nvidia,tegra194-aconnect + - const: nvidia,tegra210-aconnect + + clocks: + items: + - description: Must contain the entry for APE clock + - description: Must contain the entry for APE interface clock + + clock-names: + items: + - const: ape + - const: apb2ape + + power-domains: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + +patternProperties: + "@[0-9a-f]+$": + type: object + +required: + - compatible + - clocks + - clock-names + - power-domains + - "#address-cells" + - "#size-cells" + - ranges + +additionalProperties: false + +examples: + - | + #include + + aconnect@702c0000 { + compatible = "nvidia,tegra210-aconnect"; + clocks = <&tegra_car TEGRA210_CLK_APE>, + <&tegra_car TEGRA210_CLK_APB2APE>; + clock-names = "ape", "apb2ape"; + power-domains = <&pd_audio>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x702c0000 0x702c0000 0x00040000>; + + // Child device nodes follow ... + }; + +... -- cgit v1.2.3