From bfbf18d991756858337f7700e8ff0a6f0dc31afc Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 18 Oct 2016 10:10:24 +0200 Subject: dts: update to v4.9-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/clock/armada3700-tbg-clock.txt | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 dts/Bindings/clock/armada3700-tbg-clock.txt (limited to 'dts/Bindings/clock/armada3700-tbg-clock.txt') diff --git a/dts/Bindings/clock/armada3700-tbg-clock.txt b/dts/Bindings/clock/armada3700-tbg-clock.txt new file mode 100644 index 0000000000..0ba1d83ff3 --- /dev/null +++ b/dts/Bindings/clock/armada3700-tbg-clock.txt @@ -0,0 +1,27 @@ +* Time Base Generator Clock bindings for Marvell Armada 37xx SoCs + +Marvell Armada 37xx SoCs provde Time Base Generator clocks which are +used as parent clocks for the peripheral clocks. + +The TBG clock consumer should specify the desired clock by having the +clock ID in its "clocks" phandle cell. + +The following is a list of provided IDs and clock names on Armada 3700: + 0 = TBG A P + 1 = TBG B P + 2 = TBG A S + 3 = TBG B S + +Required properties: +- compatible : shall be "marvell,armada-3700-tbg-clock" +- reg : must be the register address of North Bridge PLL register +- #clock-cells : from common clock binding; shall be set to 1 + +Example: + +tbg: tbg@13200 { + compatible = "marvell,armada-3700-tbg-clock"; + reg = <0x13200 0x1000>; + clocks = <&xtalclk>; + #clock-cells = <1>; +}; -- cgit v1.2.3