From 4104b26d8b2d5feb372de613597143605e4bfe38 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 25 May 2021 09:18:30 +0200 Subject: dts: update to v5.13-rc3 Signed-off-by: Sascha Hauer --- dts/Bindings/clock/idt,versaclock5.yaml | 2 -- 1 file changed, 2 deletions(-) (limited to 'dts/Bindings/clock/idt,versaclock5.yaml') diff --git a/dts/Bindings/clock/idt,versaclock5.yaml b/dts/Bindings/clock/idt,versaclock5.yaml index c268debe5b..28675b0b80 100644 --- a/dts/Bindings/clock/idt,versaclock5.yaml +++ b/dts/Bindings/clock/idt,versaclock5.yaml @@ -60,7 +60,6 @@ properties: maxItems: 2 idt,xtal-load-femtofarads: - $ref: /schemas/types.yaml#/definitions/uint32 minimum: 9000 maximum: 22760 description: Optional load capacitor for XTAL1 and XTAL2 @@ -84,7 +83,6 @@ patternProperties: enum: [ 1800000, 2500000, 3300000 ] idt,slew-percent: description: The Slew rate control for CMOS single-ended. - $ref: /schemas/types.yaml#/definitions/uint32 enum: [ 80, 85, 90, 100 ] required: -- cgit v1.2.3