From 35f607bc7da71b302fd6bf3d6d48d7ea66df1195 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 11 Sep 2018 08:26:30 +0200 Subject: dts: update to v4.19-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/clock/qcom,dispcc.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 dts/Bindings/clock/qcom,dispcc.txt (limited to 'dts/Bindings/clock/qcom,dispcc.txt') diff --git a/dts/Bindings/clock/qcom,dispcc.txt b/dts/Bindings/clock/qcom,dispcc.txt new file mode 100644 index 0000000000..d639e18d0b --- /dev/null +++ b/dts/Bindings/clock/qcom,dispcc.txt @@ -0,0 +1,19 @@ +Qualcomm Technologies, Inc. Display Clock Controller Binding +------------------------------------------------------------ + +Required properties : + +- compatible : shall contain "qcom,sdm845-dispcc" +- reg : shall contain base register location and length. +- #clock-cells : from common clock binding, shall contain 1. +- #reset-cells : from common reset binding, shall contain 1. +- #power-domain-cells : from generic power domain binding, shall contain 1. + +Example: + dispcc: clock-controller@af00000 { + compatible = "qcom,sdm845-dispcc"; + reg = <0xaf00000 0x100000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; -- cgit v1.2.3