From 2036f2866753a28b2783ad6dc78a40ca5345e6d8 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 15 Oct 2019 10:55:58 +0200 Subject: dts: update to v5.4-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/clock/ti,cdce925.txt | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'dts/Bindings/clock/ti,cdce925.txt') diff --git a/dts/Bindings/clock/ti,cdce925.txt b/dts/Bindings/clock/ti,cdce925.txt index 0d01f2d5cc..26544c8520 100644 --- a/dts/Bindings/clock/ti,cdce925.txt +++ b/dts/Bindings/clock/ti,cdce925.txt @@ -24,6 +24,8 @@ Required properties: Optional properties: - xtal-load-pf: Crystal load-capacitor value to fine-tune performance on a board, or to compensate for external influences. +- vdd-supply: A regulator node for Vdd +- vddout-supply: A regulator node for Vddout For all PLL1, PLL2, ... an optional child node can be used to specify spread spectrum clocking parameters for a board. @@ -41,6 +43,8 @@ Example: clocks = <&xtal_27Mhz>; #clock-cells = <1>; xtal-load-pf = <5>; + vdd-supply = <&1v8-reg>; + vddout-supply = <&3v3-reg>; /* PLL options to get SSC 1% centered */ PLL2 { spread-spectrum = <4>; -- cgit v1.2.3