From 1f2570eb41c8ebc983e97ff0608d77260c2ba16b Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 27 Jul 2023 07:08:56 +0200 Subject: dts: update to v6.5-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/crypto/amlogic,gxl-crypto.yaml | 4 +- dts/Bindings/crypto/fsl,sec-v4.0-mon.yaml | 6 +++ dts/Bindings/crypto/fsl-dcp.yaml | 12 +++-- dts/Bindings/crypto/intel,ixp4xx-crypto.yaml | 6 +-- dts/Bindings/crypto/qcom-qce.yaml | 50 ++++++++++++++---- dts/Bindings/crypto/starfive,jh7110-crypto.yaml | 70 +++++++++++++++++++++++++ dts/Bindings/crypto/xlnx,zynqmp-aes.yaml | 4 +- 7 files changed, 133 insertions(+), 19 deletions(-) create mode 100644 dts/Bindings/crypto/starfive,jh7110-crypto.yaml (limited to 'dts/Bindings/crypto') diff --git a/dts/Bindings/crypto/amlogic,gxl-crypto.yaml b/dts/Bindings/crypto/amlogic,gxl-crypto.yaml index ecf98a9e72..948e11ebe4 100644 --- a/dts/Bindings/crypto/amlogic,gxl-crypto.yaml +++ b/dts/Bindings/crypto/amlogic,gxl-crypto.yaml @@ -19,8 +19,8 @@ properties: interrupts: items: - - description: "Interrupt for flow 0" - - description: "Interrupt for flow 1" + - description: Interrupt for flow 0 + - description: Interrupt for flow 1 clocks: maxItems: 1 diff --git a/dts/Bindings/crypto/fsl,sec-v4.0-mon.yaml b/dts/Bindings/crypto/fsl,sec-v4.0-mon.yaml index 286dffa067..e879bc0be8 100644 --- a/dts/Bindings/crypto/fsl,sec-v4.0-mon.yaml +++ b/dts/Bindings/crypto/fsl,sec-v4.0-mon.yaml @@ -103,6 +103,12 @@ properties: wakeup-source: true linux,keycode: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 116 + deprecated: true + + linux,keycodes: + maxItems: 1 default: 116 required: diff --git a/dts/Bindings/crypto/fsl-dcp.yaml b/dts/Bindings/crypto/fsl-dcp.yaml index 99be01539f..8dd36c2f76 100644 --- a/dts/Bindings/crypto/fsl-dcp.yaml +++ b/dts/Bindings/crypto/fsl-dcp.yaml @@ -11,9 +11,15 @@ maintainers: properties: compatible: - enum: - - fsl,imx23-dcp - - fsl,imx28-dcp + oneOf: + - enum: + - fsl,imx23-dcp + - fsl,imx28-dcp + - items: + - enum: + - fsl,imx6sl-dcp + - fsl,imx6ull-dcp + - const: fsl,imx28-dcp reg: maxItems: 1 diff --git a/dts/Bindings/crypto/intel,ixp4xx-crypto.yaml b/dts/Bindings/crypto/intel,ixp4xx-crypto.yaml index e0fe639578..a4006237aa 100644 --- a/dts/Bindings/crypto/intel,ixp4xx-crypto.yaml +++ b/dts/Bindings/crypto/intel,ixp4xx-crypto.yaml @@ -2,8 +2,8 @@ # Copyright 2018 Linaro Ltd. %YAML 1.2 --- -$id: "http://devicetree.org/schemas/crypto/intel,ixp4xx-crypto.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/crypto/intel,ixp4xx-crypto.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: Intel IXP4xx cryptographic engine @@ -21,7 +21,7 @@ properties: const: intel,ixp4xx-crypto intel,npe-handle: - $ref: '/schemas/types.yaml#/definitions/phandle-array' + $ref: /schemas/types.yaml#/definitions/phandle-array items: - items: - description: phandle to the NPE this crypto engine diff --git a/dts/Bindings/crypto/qcom-qce.yaml b/dts/Bindings/crypto/qcom-qce.yaml index e375bd9813..bb828068c3 100644 --- a/dts/Bindings/crypto/qcom-qce.yaml +++ b/dts/Bindings/crypto/qcom-qce.yaml @@ -24,12 +24,20 @@ properties: deprecated: true description: Kept only for ABI backward compatibility + - items: + - enum: + - qcom,ipq4019-qce + - qcom,sm8150-qce + - const: qcom,qce + - items: - enum: - qcom,ipq6018-qce - qcom,ipq8074-qce - qcom,msm8996-qce + - qcom,qcm2290-qce - qcom,sdm845-qce + - qcom,sm6115-qce - const: qcom,ipq4019-qce - const: qcom,qce @@ -46,16 +54,12 @@ properties: maxItems: 1 clocks: - items: - - description: iface clocks register interface. - - description: bus clocks data transfer interface. - - description: core clocks rest of the crypto block. + minItems: 1 + maxItems: 3 clock-names: - items: - - const: iface - - const: bus - - const: core + minItems: 1 + maxItems: 3 iommus: minItems: 1 @@ -89,9 +93,37 @@ allOf: enum: - qcom,crypto-v5.1 - qcom,crypto-v5.4 - - qcom,ipq4019-qce + - qcom,ipq6018-qce + - qcom,ipq8074-qce + - qcom,msm8996-qce + - qcom,sdm845-qce + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: iface + - const: bus + - const: core + required: + - clocks + - clock-names + - if: + properties: + compatible: + contains: + enum: + - qcom,qcm2290-qce + - qcom,sm6115-qce then: + properties: + clocks: + maxItems: 1 + clock-names: + items: + - const: core required: - clocks - clock-names diff --git a/dts/Bindings/crypto/starfive,jh7110-crypto.yaml b/dts/Bindings/crypto/starfive,jh7110-crypto.yaml new file mode 100644 index 0000000000..71a2876bd6 --- /dev/null +++ b/dts/Bindings/crypto/starfive,jh7110-crypto.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/starfive,jh7110-crypto.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive Cryptographic Module + +maintainers: + - Jia Jie Ho + - William Qiu + +properties: + compatible: + const: starfive,jh7110-crypto + + reg: + maxItems: 1 + + clocks: + items: + - description: Hardware reference clock + - description: AHB reference clock + + clock-names: + items: + - const: hclk + - const: ahb + + interrupts: + maxItems: 1 + + resets: + maxItems: 1 + + dmas: + items: + - description: TX DMA channel + - description: RX DMA channel + + dma-names: + items: + - const: tx + - const: rx + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - dmas + - dma-names + +additionalProperties: false + +examples: + - | + crypto: crypto@16000000 { + compatible = "starfive,jh7110-crypto"; + reg = <0x16000000 0x4000>; + clocks = <&clk 15>, <&clk 16>; + clock-names = "hclk", "ahb"; + interrupts = <28>; + resets = <&reset 3>; + dmas = <&dma 1 2>, + <&dma 0 2>; + dma-names = "tx", "rx"; + }; +... diff --git a/dts/Bindings/crypto/xlnx,zynqmp-aes.yaml b/dts/Bindings/crypto/xlnx,zynqmp-aes.yaml index 9e8fbd02b1..8aead97a58 100644 --- a/dts/Bindings/crypto/xlnx,zynqmp-aes.yaml +++ b/dts/Bindings/crypto/xlnx,zynqmp-aes.yaml @@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Xilinx ZynqMP AES-GCM Hardware Accelerator maintainers: - - Kalyani Akula - - Michal Simek + - Kalyani Akula + - Michal Simek description: | The ZynqMP AES-GCM hardened cryptographic accelerator is used to -- cgit v1.2.3