From a4f4bc65b33164eb8c19bcff9834cc87bcc845bb Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 13 Jun 2016 07:29:57 +0200 Subject: dts: update to v4.6-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/edac/apm-xgene-edac.txt | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'dts/Bindings/edac') diff --git a/dts/Bindings/edac/apm-xgene-edac.txt b/dts/Bindings/edac/apm-xgene-edac.txt index 78e2a31c58..1006b04894 100644 --- a/dts/Bindings/edac/apm-xgene-edac.txt +++ b/dts/Bindings/edac/apm-xgene-edac.txt @@ -16,6 +16,10 @@ Required properties: - regmap-mcba : Regmap of the MCB-A (memory bridge) resource. - regmap-mcbb : Regmap of the MCB-B (memory bridge) resource. - regmap-efuse : Regmap of the PMD efuse resource. +- regmap-rb : Regmap of the register bus resource. This property + is optional only for compatibility. If the RB + error conditions are not cleared, it will + continuously generate interrupt. - reg : First resource shall be the CPU bus (PCP) resource. - interrupts : Interrupt-specifier for MCU, PMD, L3, or SoC error IRQ(s). @@ -64,6 +68,11 @@ Example: reg = <0x0 0x1054a000 0x0 0x20>; }; + rb: rb@7e000000 { + compatible = "apm,xgene-rb", "syscon"; + reg = <0x0 0x7e000000 0x0 0x10>; + }; + edac@78800000 { compatible = "apm,xgene-edac"; #address-cells = <2>; @@ -73,6 +82,7 @@ Example: regmap-mcba = <&mcba>; regmap-mcbb = <&mcbb>; regmap-efuse = <&efuse>; + regmap-rb = <&rb>; reg = <0x0 0x78800000 0x0 0x100>; interrupts = <0x0 0x20 0x4>, <0x0 0x21 0x4>, -- cgit v1.2.3