From 6e6d9a2ff045f09d5a03e876becea5e6a1dabe90 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 8 Dec 2015 07:35:17 +0100 Subject: dts: update to v4.4-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/fpga/altera-socfpga-fpga-mgr.txt | 2 +- dts/Bindings/fpga/xilinx-zynq-fpga-mgr.txt | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+), 1 deletion(-) create mode 100644 dts/Bindings/fpga/xilinx-zynq-fpga-mgr.txt (limited to 'dts/Bindings/fpga') diff --git a/dts/Bindings/fpga/altera-socfpga-fpga-mgr.txt b/dts/Bindings/fpga/altera-socfpga-fpga-mgr.txt index 9b027a6154..d52f334041 100644 --- a/dts/Bindings/fpga/altera-socfpga-fpga-mgr.txt +++ b/dts/Bindings/fpga/altera-socfpga-fpga-mgr.txt @@ -9,7 +9,7 @@ Required properties: Example: - hps_0_fpgamgr: fpgamgr@0xff706000 { + hps_0_fpgamgr: fpgamgr@ff706000 { compatible = "altr,socfpga-fpga-mgr"; reg = <0xFF706000 0x1000 0xFFB90000 0x1000>; diff --git a/dts/Bindings/fpga/xilinx-zynq-fpga-mgr.txt b/dts/Bindings/fpga/xilinx-zynq-fpga-mgr.txt new file mode 100644 index 0000000000..7018aa8968 --- /dev/null +++ b/dts/Bindings/fpga/xilinx-zynq-fpga-mgr.txt @@ -0,0 +1,19 @@ +Xilinx Zynq FPGA Manager + +Required properties: +- compatible: should contain "xlnx,zynq-devcfg-1.0" +- reg: base address and size for memory mapped io +- interrupts: interrupt for the FPGA manager device +- clocks: phandle for clocks required operation +- clock-names: name for the clock, should be "ref_clk" +- syscon: phandle for access to SLCR registers + +Example: + devcfg: devcfg@f8007000 { + compatible = "xlnx,zynq-devcfg-1.0"; + reg = <0xf8007000 0x100>; + interrupts = <0 8 4>; + clocks = <&clkc 12>; + clock-names = "ref_clk"; + syscon = <&slcr>; + }; -- cgit v1.2.3