From 33fdc89d4cbd74aa54c28dc61d62972ab164e64d Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 14 Jan 2019 09:09:57 +0100 Subject: dts: update to v5.0-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/gpio/cdns,gpio.txt | 43 +++++++++++++++++++++++++++++++++ dts/Bindings/gpio/gpio-omap.txt | 10 ++++++-- dts/Bindings/gpio/gpio-vf610.txt | 6 +++++ dts/Bindings/gpio/nxp,lpc1850-gpio.txt | 38 ++++++++++++++++++++++------- dts/Bindings/gpio/renesas,gpio-rcar.txt | 1 + dts/Bindings/gpio/snps-dwapb-gpio.txt | 4 +-- 6 files changed, 89 insertions(+), 13 deletions(-) create mode 100644 dts/Bindings/gpio/cdns,gpio.txt (limited to 'dts/Bindings/gpio') diff --git a/dts/Bindings/gpio/cdns,gpio.txt b/dts/Bindings/gpio/cdns,gpio.txt new file mode 100644 index 0000000000..706ef00f5c --- /dev/null +++ b/dts/Bindings/gpio/cdns,gpio.txt @@ -0,0 +1,43 @@ +Cadence GPIO controller bindings + +Required properties: +- compatible: should be "cdns,gpio-r1p02". +- reg: the register base address and size. +- #gpio-cells: should be 2. + * first cell is the GPIO number. + * second cell specifies the GPIO flags, as defined in + . Only the GPIO_ACTIVE_HIGH + and GPIO_ACTIVE_LOW flags are supported. +- gpio-controller: marks the device as a GPIO controller. +- clocks: should contain one entry referencing the peripheral clock driving + the GPIO controller. + +Optional properties: +- ngpios: integer number of gpio lines supported by this controller, up to 32. +- interrupts: interrupt specifier for the controllers interrupt. +- interrupt-controller: marks the device as an interrupt controller. When + defined, interrupts, interrupt-parent and #interrupt-cells + are required. +- interrupt-cells: should be 2. + * first cell is the GPIO number you want to use as an IRQ source. + * second cell specifies the IRQ type, as defined in + . + Currently only level sensitive IRQs are supported. + + +Example: + gpio0: gpio-controller@fd060000 { + compatible = "cdns,gpio-r1p02"; + reg =<0xfd060000 0x1000>; + + clocks = <&gpio_clk>; + + interrupt-parent = <&gic>; + interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; diff --git a/dts/Bindings/gpio/gpio-omap.txt b/dts/Bindings/gpio/gpio-omap.txt index 8d950522e7..e57b2cb28f 100644 --- a/dts/Bindings/gpio/gpio-omap.txt +++ b/dts/Bindings/gpio/gpio-omap.txt @@ -5,6 +5,8 @@ Required properties: - "ti,omap2-gpio" for OMAP2 controllers - "ti,omap3-gpio" for OMAP3 controllers - "ti,omap4-gpio" for OMAP4 controllers +- reg : Physical base address of the controller and length of memory mapped + region. - gpio-controller : Marks the device node as a GPIO controller. - #gpio-cells : Should be two. - first cell is the pin number @@ -18,6 +20,8 @@ Required properties: 2 = high-to-low edge triggered. 4 = active high level-sensitive. 8 = active low level-sensitive. +- interrupts : The interrupt the controller is rising as output when an + interrupt occures OMAP specific properties: - ti,hwmods: Name of the hwmod associated to the GPIO: @@ -29,11 +33,13 @@ OMAP specific properties: Example: -gpio4: gpio4 { +gpio0: gpio@44e07000 { compatible = "ti,omap4-gpio"; - ti,hwmods = "gpio4"; + reg = <0x44e07000 0x1000>; + ti,hwmods = "gpio1"; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + interrupts = <96>; }; diff --git a/dts/Bindings/gpio/gpio-vf610.txt b/dts/Bindings/gpio/gpio-vf610.txt index 0ccbae4401..ae254aadee 100644 --- a/dts/Bindings/gpio/gpio-vf610.txt +++ b/dts/Bindings/gpio/gpio-vf610.txt @@ -24,6 +24,12 @@ Required properties for GPIO node: 4 = active high level-sensitive. 8 = active low level-sensitive. +Optional properties: +-clocks: Must contain an entry for each entry in clock-names. + See common clock-bindings.txt for details. +-clock-names: A list of clock names. For imx7ulp, it must contain + "gpio", "port". + Note: Each GPIO port should have an alias correctly numbered in "aliases" node. diff --git a/dts/Bindings/gpio/nxp,lpc1850-gpio.txt b/dts/Bindings/gpio/nxp,lpc1850-gpio.txt index eb7cdd69e1..627efc78ec 100644 --- a/dts/Bindings/gpio/nxp,lpc1850-gpio.txt +++ b/dts/Bindings/gpio/nxp,lpc1850-gpio.txt @@ -3,12 +3,24 @@ NXP LPC18xx/43xx GPIO controller Device Tree Bindings Required properties: - compatible : Should be "nxp,lpc1850-gpio" -- reg : Address and length of the register set for the device -- clocks : Clock specifier (see clock bindings for details) -- gpio-controller : Marks the device node as a GPIO controller. -- #gpio-cells : Should be two - - First cell is the GPIO line number - - Second cell is used to specify polarity +- reg : List of addresses and lengths of the GPIO controller + register sets +- reg-names : Should be "gpio", "gpio-pin-ic", "gpio-group0-ic" and + "gpio-gpoup1-ic" +- clocks : Phandle and clock specifier pair for GPIO controller +- resets : Phandle and reset specifier pair for GPIO controller +- gpio-controller : Marks the device node as a GPIO controller +- #gpio-cells : Should be two: + - The first cell is the GPIO line number + - The second cell is used to specify polarity +- interrupt-controller : Marks the device node as an interrupt controller +- #interrupt-cells : Should be two: + - The first cell is an interrupt number within + 0..9 range, for GPIO pin interrupts it is equal + to 'nxp,gpio-pin-interrupt' property value of + GPIO pin configuration, 8 is for GPIO GROUP0 + interrupt, 9 is for GPIO GROUP1 interrupt + - The second cell is used to specify interrupt type Optional properties: - gpio-ranges : Mapping between GPIO and pinctrl @@ -19,21 +31,29 @@ Example: gpio: gpio@400f4000 { compatible = "nxp,lpc1850-gpio"; - reg = <0x400f4000 0x4000>; + reg = <0x400f4000 0x4000>, <0x40087000 0x1000>, + <0x40088000 0x1000>, <0x40089000 0x1000>; + reg-names = "gpio", "gpio-pin-ic", + "gpio-group0-ic", "gpio-gpoup1-ic"; clocks = <&ccu1 CLK_CPU_GPIO>; + resets = <&rgu 28>; gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; gpio-ranges = <&pinctrl LPC_GPIO(0,0) LPC_PIN(0,0) 2>, ... <&pinctrl LPC_GPIO(7,19) LPC_PIN(f,5) 7>; }; gpio_joystick { - compatible = "gpio-keys-polled"; + compatible = "gpio-keys"; ... - button@0 { + button0 { ... + interrupt-parent = <&gpio>; + interrupts = <1 IRQ_TYPE_EDGE_BOTH>; gpios = <&gpio LPC_GPIO(4,8) GPIO_ACTIVE_LOW>; }; }; diff --git a/dts/Bindings/gpio/renesas,gpio-rcar.txt b/dts/Bindings/gpio/renesas,gpio-rcar.txt index 2889bbcd74..f3f2c468c1 100644 --- a/dts/Bindings/gpio/renesas,gpio-rcar.txt +++ b/dts/Bindings/gpio/renesas,gpio-rcar.txt @@ -8,6 +8,7 @@ Required Properties: - "renesas,gpio-r8a7745": for R8A7745 (RZ/G1E) compatible GPIO controller. - "renesas,gpio-r8a77470": for R8A77470 (RZ/G1C) compatible GPIO controller. - "renesas,gpio-r8a774a1": for R8A774A1 (RZ/G2M) compatible GPIO controller. + - "renesas,gpio-r8a774c0": for R8A774C0 (RZ/G2E) compatible GPIO controller. - "renesas,gpio-r8a7778": for R8A7778 (R-Car M1) compatible GPIO controller. - "renesas,gpio-r8a7779": for R8A7779 (R-Car H1) compatible GPIO controller. - "renesas,gpio-r8a7790": for R8A7790 (R-Car H2) compatible GPIO controller. diff --git a/dts/Bindings/gpio/snps-dwapb-gpio.txt b/dts/Bindings/gpio/snps-dwapb-gpio.txt index 7276b50c35..839dd32ffe 100644 --- a/dts/Bindings/gpio/snps-dwapb-gpio.txt +++ b/dts/Bindings/gpio/snps-dwapb-gpio.txt @@ -43,7 +43,7 @@ gpio: gpio@20000 { #address-cells = <1>; #size-cells = <0>; - porta: gpio-controller@0 { + porta: gpio@0 { compatible = "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells = <2>; @@ -55,7 +55,7 @@ gpio: gpio@20000 { interrupts = <0>; }; - portb: gpio-controller@1 { + portb: gpio@1 { compatible = "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells = <2>; -- cgit v1.2.3