From 3f2f5980d517b6a71ffe54e615bd3a4b58b1c295 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 17 Nov 2021 07:36:09 +0100 Subject: dts: update to v5.16-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/gpio/gpio-axp209.txt | 75 ------------------------- dts/Bindings/gpio/gpio-xlp.txt | 49 ---------------- dts/Bindings/gpio/rockchip,gpio-bank.yaml | 2 + dts/Bindings/gpio/x-powers,axp209-gpio.yaml | 55 ++++++++++++++++++ dts/Bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml | 43 ++++++++++++++ 5 files changed, 100 insertions(+), 124 deletions(-) delete mode 100644 dts/Bindings/gpio/gpio-axp209.txt delete mode 100644 dts/Bindings/gpio/gpio-xlp.txt create mode 100644 dts/Bindings/gpio/x-powers,axp209-gpio.yaml create mode 100644 dts/Bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml (limited to 'dts/Bindings/gpio') diff --git a/dts/Bindings/gpio/gpio-axp209.txt b/dts/Bindings/gpio/gpio-axp209.txt deleted file mode 100644 index fc42b2caa0..0000000000 --- a/dts/Bindings/gpio/gpio-axp209.txt +++ /dev/null @@ -1,75 +0,0 @@ -AXP209 GPIO & pinctrl controller - -This driver follows the usual GPIO bindings found in -Documentation/devicetree/bindings/gpio/gpio.txt - -This driver follows the usual pinctrl bindings found in -Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt - -This driver employs the per-pin muxing pattern. - -Required properties: -- compatible: Should be one of: - - "x-powers,axp209-gpio" - - "x-powers,axp813-gpio" -- #gpio-cells: Should be two. The first cell is the pin number and the - second is the GPIO flags. -- gpio-controller: Marks the device node as a GPIO controller. - -This node must be a subnode of the axp20x PMIC, documented in -Documentation/devicetree/bindings/mfd/axp20x.txt - -Example: - -axp209: pmic@34 { - compatible = "x-powers,axp209"; - reg = <0x34>; - interrupt-parent = <&nmi_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <1>; - - axp_gpio: gpio { - compatible = "x-powers,axp209-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; -}; - -The GPIOs can be muxed to other functions and therefore, must be a subnode of -axp_gpio. - -Example: - -&axp_gpio { - gpio0_adc: gpio0-adc { - pins = "GPIO0"; - function = "adc"; - }; -}; - -&example_node { - pinctrl-names = "default"; - pinctrl-0 = <&gpio0_adc>; -}; - -GPIOs and their functions -------------------------- - -Each GPIO is independent from the other (i.e. GPIO0 in gpio_in function does -not force GPIO1 and GPIO2 to be in gpio_in function as well). - -axp209 ------- -GPIO | Functions ------------------------- -GPIO0 | gpio_in, gpio_out, ldo, adc -GPIO1 | gpio_in, gpio_out, ldo, adc -GPIO2 | gpio_in, gpio_out - -axp813 ------- -GPIO | Functions ------------------------- -GPIO0 | gpio_in, gpio_out, ldo, adc -GPIO1 | gpio_in, gpio_out, ldo diff --git a/dts/Bindings/gpio/gpio-xlp.txt b/dts/Bindings/gpio/gpio-xlp.txt deleted file mode 100644 index 47fc64922f..0000000000 --- a/dts/Bindings/gpio/gpio-xlp.txt +++ /dev/null @@ -1,49 +0,0 @@ -Netlogic XLP Family GPIO -======================== - -This GPIO driver is used for following Netlogic XLP SoCs: - XLP832, XLP316, XLP208, XLP980, XLP532 -This GPIO driver is also compatible with GPIO controller found on -Broadcom Vulcan ARM64. - -Required properties: -------------------- - -- compatible: Should be one of the following: - - "netlogic,xlp832-gpio": For Netlogic XLP832 - - "netlogic,xlp316-gpio": For Netlogic XLP316 - - "netlogic,xlp208-gpio": For Netlogic XLP208 - - "netlogic,xlp980-gpio": For Netlogic XLP980 - - "netlogic,xlp532-gpio": For Netlogic XLP532 - - "brcm,vulcan-gpio": For Broadcom Vulcan ARM64 -- reg: Physical base address and length of the controller's registers. -- #gpio-cells: Should be two. The first cell is the pin number and the second - cell is used to specify optional parameters (currently unused). -- gpio-controller: Marks the device node as a GPIO controller. -- nr-gpios: Number of GPIO pins supported by the controller. -- interrupt-cells: Should be two. The first cell is the GPIO Number. The - second cell is used to specify flags. The following subset of flags is - supported: - - trigger type: - 1 = low to high edge triggered. - 2 = high to low edge triggered. - 4 = active high level-sensitive. - 8 = active low level-sensitive. -- interrupts: Interrupt number for this device. -- interrupt-controller: Identifies the node as an interrupt controller. - -Example: - - gpio: xlp_gpio@34000 { - compatible = "netlogic,xlp316-gpio"; - reg = <0 0x34100 0x1000 - 0 0x35100 0x1000>; - #gpio-cells = <2>; - gpio-controller; - nr-gpios = <57>; - - #interrupt-cells = <2>; - interrupt-parent = <&pic>; - interrupts = <39>; - interrupt-controller; - }; diff --git a/dts/Bindings/gpio/rockchip,gpio-bank.yaml b/dts/Bindings/gpio/rockchip,gpio-bank.yaml index 0d62c28fb5..d4e42c2b99 100644 --- a/dts/Bindings/gpio/rockchip,gpio-bank.yaml +++ b/dts/Bindings/gpio/rockchip,gpio-bank.yaml @@ -29,6 +29,8 @@ properties: gpio-controller: true + gpio-line-names: true + "#gpio-cells": const: 2 diff --git a/dts/Bindings/gpio/x-powers,axp209-gpio.yaml b/dts/Bindings/gpio/x-powers,axp209-gpio.yaml new file mode 100644 index 0000000000..0f628b088c --- /dev/null +++ b/dts/Bindings/gpio/x-powers,axp209-gpio.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/gpio/x-powers,axp209-gpio.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: X-Powers AXP209 GPIO Device Tree Bindings + +maintainers: + - Chen-Yu Tsai + +properties: + "#gpio-cells": + const: 2 + description: > + The first cell is the pin number and the second is the GPIO flags. + + compatible: + oneOf: + - enum: + - x-powers,axp209-gpio + - x-powers,axp813-gpio + - items: + - const: x-powers,axp803-gpio + - const: x-powers,axp813-gpio + + gpio-controller: true + +patternProperties: + "^.*-pins?$": + $ref: /schemas/pinctrl/pinmux-node.yaml# + + properties: + pins: + items: + enum: + - GPIO0 + - GPIO1 + - GPIO2 + + function: + enum: + - adc + - ldo + - gpio_in + - gpio_out + +required: + - compatible + - "#gpio-cells" + - gpio-controller + +additionalProperties: false + +... diff --git a/dts/Bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml b/dts/Bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml new file mode 100644 index 0000000000..31c0fc3459 --- /dev/null +++ b/dts/Bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: ZynqMP Mode Pin GPIO controller + +description: + PS_MODE is 4-bits boot mode pins sampled on POR deassertion. Mode Pin + GPIO controller with configurable from numbers of pins (from 0 to 3 per + PS_MODE). Every pin can be configured as input/output. + +maintainers: + - Piyush Mehta + +properties: + compatible: + const: xlnx,zynqmp-gpio-modepin + + gpio-controller: true + + "#gpio-cells": + const: 2 + +required: + - compatible + - gpio-controller + - "#gpio-cells" + +additionalProperties: false + +examples: + - | + zynqmp-firmware { + gpio { + compatible = "xlnx,zynqmp-gpio-modepin"; + gpio-controller; + #gpio-cells = <2>; + }; + }; + +... -- cgit v1.2.3