From bfbf18d991756858337f7700e8ff0a6f0dc31afc Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 18 Oct 2016 10:10:24 +0200 Subject: dts: update to v4.9-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/gpio/brcm,bcm6345-gpio.txt | 46 +++++++++++++++++++++++++++++++++ dts/Bindings/gpio/gpio-aspeed.txt | 36 ++++++++++++++++++++++++++ dts/Bindings/gpio/gpio-axp209.txt | 30 +++++++++++++++++++++ dts/Bindings/gpio/gpio-tpic2810.txt | 16 ++++++++++++ dts/Bindings/gpio/gpio-tps65086.txt | 16 ------------ dts/Bindings/gpio/gpio-ts4900.txt | 30 +++++++++++++++++++++ dts/Bindings/gpio/mrvl-gpio.txt | 23 ----------------- dts/Bindings/gpio/renesas,gpio-rcar.txt | 1 + 8 files changed, 159 insertions(+), 39 deletions(-) create mode 100644 dts/Bindings/gpio/brcm,bcm6345-gpio.txt create mode 100644 dts/Bindings/gpio/gpio-aspeed.txt create mode 100644 dts/Bindings/gpio/gpio-axp209.txt create mode 100644 dts/Bindings/gpio/gpio-tpic2810.txt delete mode 100644 dts/Bindings/gpio/gpio-tps65086.txt create mode 100644 dts/Bindings/gpio/gpio-ts4900.txt (limited to 'dts/Bindings/gpio') diff --git a/dts/Bindings/gpio/brcm,bcm6345-gpio.txt b/dts/Bindings/gpio/brcm,bcm6345-gpio.txt new file mode 100644 index 0000000000..e7853143fa --- /dev/null +++ b/dts/Bindings/gpio/brcm,bcm6345-gpio.txt @@ -0,0 +1,46 @@ +Bindings for the Broadcom's brcm,bcm6345-gpio memory-mapped GPIO controllers. + +These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345 +are the only ones which don't need a pinctrl driver. +BCM6338 have 8-bit data and dirout registers, where GPIO state can be read +and/or written, and the direction changed from input to output. +BCM6345 have 16-bit data and dirout registers, where GPIO state can be read +and/or written, and the direction changed from input to output. + +Required properties: + - compatible: should be "brcm,bcm6345-gpio" + - reg-names: must contain + "dat" - data register + "dirout" - direction (output) register + - reg: address + size pairs describing the GPIO register sets; + order must correspond with the order of entries in reg-names + - #gpio-cells: must be set to 2. The first cell is the pin number and + the second cell is used to specify the gpio polarity: + 0 = active high + 1 = active low + - gpio-controller: Marks the device node as a gpio controller. + +Optional properties: + - native-endian: use native endian memory. + +Examples: + - BCM6338: + gpio: gpio-controller@fffe0407 { + compatible = "brcm,bcm6345-gpio"; + reg-names = "dirout", "dat"; + reg = <0xfffe0407 1>, <0xfffe040f 1>; + + #gpio-cells = <2>; + gpio-controller; + }; + + - BCM6345: + gpio: gpio-controller@fffe0406 { + compatible = "brcm,bcm6345-gpio"; + reg-names = "dirout", "dat"; + reg = <0xfffe0406 2>, <0xfffe040a 2>; + native-endian; + + #gpio-cells = <2>; + gpio-controller; + }; diff --git a/dts/Bindings/gpio/gpio-aspeed.txt b/dts/Bindings/gpio/gpio-aspeed.txt new file mode 100644 index 0000000000..393bb2ed8a --- /dev/null +++ b/dts/Bindings/gpio/gpio-aspeed.txt @@ -0,0 +1,36 @@ +Aspeed GPIO controller Device Tree Bindings +------------------------------------------- + +Required properties: +- compatible : Either "aspeed,ast2400-gpio" or "aspeed,ast2500-gpio" + +- #gpio-cells : Should be two + - First cell is the GPIO line number + - Second cell is used to specify optional + parameters (unused) + +- reg : Address and length of the register set for the device +- gpio-controller : Marks the device node as a GPIO controller. +- interrupts : Interrupt specifier (see interrupt bindings for + details) +- interrupt-controller : Mark the GPIO controller as an interrupt-controller + +Optional properties: + +- interrupt-parent : The parent interrupt controller, optional if inherited + +The gpio and interrupt properties are further described in their respective +bindings documentation: + +- Documentation/devicetree/bindings/gpio/gpio.txt +- Documentation/devicetree/bindings/interrupt-controller/interrupts.txt + + Example: + gpio@1e780000 { + #gpio-cells = <2>; + compatible = "aspeed,ast2400-gpio"; + gpio-controller; + interrupts = <20>; + reg = <0x1e780000 0x1000>; + interrupt-controller; + }; diff --git a/dts/Bindings/gpio/gpio-axp209.txt b/dts/Bindings/gpio/gpio-axp209.txt new file mode 100644 index 0000000000..a6611304dd --- /dev/null +++ b/dts/Bindings/gpio/gpio-axp209.txt @@ -0,0 +1,30 @@ +AXP209 GPIO controller + +This driver follows the usual GPIO bindings found in +Documentation/devicetree/bindings/gpio/gpio.txt + +Required properties: +- compatible: Should be "x-powers,axp209-gpio" +- #gpio-cells: Should be two. The first cell is the pin number and the + second is the GPIO flags. +- gpio-controller: Marks the device node as a GPIO controller. + +This node must be a subnode of the axp20x PMIC, documented in +Documentation/devicetree/bindings/mfd/axp20x.txt + +Example: + +axp209: pmic@34 { + compatible = "x-powers,axp209"; + reg = <0x34>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <1>; + + axp_gpio: gpio { + compatible = "x-powers,axp209-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; +}; diff --git a/dts/Bindings/gpio/gpio-tpic2810.txt b/dts/Bindings/gpio/gpio-tpic2810.txt new file mode 100644 index 0000000000..1afc2de7a5 --- /dev/null +++ b/dts/Bindings/gpio/gpio-tpic2810.txt @@ -0,0 +1,16 @@ +TPIC2810 GPIO controller bindings + +Required properties: + - compatible : Should be "ti,tpic2810". + - reg : The I2C address of the device + - gpio-controller : Marks the device node as a GPIO controller. + - #gpio-cells : Should be two. For consumer use see gpio.txt. + +Example: + + gpio@60 { + compatible = "ti,tpic2810"; + reg = <0x60>; + gpio-controller; + #gpio-cells = <2>; + }; diff --git a/dts/Bindings/gpio/gpio-tps65086.txt b/dts/Bindings/gpio/gpio-tps65086.txt deleted file mode 100644 index ba051074be..0000000000 --- a/dts/Bindings/gpio/gpio-tps65086.txt +++ /dev/null @@ -1,16 +0,0 @@ -* TPS65086 GPO Controller bindings - -Required properties: - - compatible : Should be "ti,tps65086-gpio". - - gpio-controller : Marks the device node as a GPIO Controller. - - #gpio-cells : Should be two. The first cell is the pin number - and the second cell is used to specify flags. - See ../gpio/gpio.txt for possible values. - -Example: - - gpio4: gpio { - compatible = "ti,tps65086-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; diff --git a/dts/Bindings/gpio/gpio-ts4900.txt b/dts/Bindings/gpio/gpio-ts4900.txt new file mode 100644 index 0000000000..3f8e71b1ab --- /dev/null +++ b/dts/Bindings/gpio/gpio-ts4900.txt @@ -0,0 +1,30 @@ +* Technologic Systems I2C-FPGA's GPIO controller bindings + +This bindings describes the GPIO controller for Technologic's FPGA core. +TS-4900's FPGA encodes the GPIO state on 3 bits, whereas the TS-7970's FPGA +uses 2 bits: it doesn't use a dedicated input bit. + +Required properties: +- compatible: Should be one of the following + "technologic,ts4900-gpio" + "technologic,ts7970-gpio" +- reg: Physical base address of the controller and length + of memory mapped region. +- #gpio-cells: Should be two. The first cell is the pin number. +- gpio-controller: Marks the device node as a gpio controller. + +Optional property: +- ngpios: Number of GPIOs this controller is instantiated with, + the default is 32. See gpio.txt for more details. + +Example: + +&i2c2 { + gpio8: gpio@28 { + compatible = "technologic,ts4900-gpio"; + reg = <0x28>; + #gpio-cells = <2>; + gpio-controller; + ngpios = <32>; + }; +}; diff --git a/dts/Bindings/gpio/mrvl-gpio.txt b/dts/Bindings/gpio/mrvl-gpio.txt index 98d1983969..c3d016532d 100644 --- a/dts/Bindings/gpio/mrvl-gpio.txt +++ b/dts/Bindings/gpio/mrvl-gpio.txt @@ -44,26 +44,3 @@ Example for a PXA3xx platform: interrupt-controller; #interrupt-cells = <0x2>; }; - -* Marvell Orion GPIO Controller - -Required properties: -- compatible : Should be "marvell,orion-gpio" -- reg : Address and length of the register set for controller. -- gpio-controller : So we know this is a gpio controller. -- ngpio : How many gpios this controller has. -- interrupts : Up to 4 Interrupts for the controller. - -Optional properties: -- mask-offset : For SMP Orions, offset for Nth CPU - -Example: - - gpio0: gpio@10100 { - compatible = "marvell,orion-gpio"; - #gpio-cells = <2>; - gpio-controller; - reg = <0x10100 0x40>; - ngpio = <32>; - interrupts = <35>, <36>, <37>, <38>; - }; diff --git a/dts/Bindings/gpio/renesas,gpio-rcar.txt b/dts/Bindings/gpio/renesas,gpio-rcar.txt index 8da26b35b5..7c1ab3b325 100644 --- a/dts/Bindings/gpio/renesas,gpio-rcar.txt +++ b/dts/Bindings/gpio/renesas,gpio-rcar.txt @@ -11,6 +11,7 @@ Required Properties: - "renesas,gpio-r8a7793": for R8A7793 (R-Car M2-N) compatible GPIO controller. - "renesas,gpio-r8a7794": for R8A7794 (R-Car E2) compatible GPIO controller. - "renesas,gpio-r8a7795": for R8A7795 (R-Car H3) compatible GPIO controller. + - "renesas,gpio-r8a7796": for R8A7796 (R-Car M3-W) compatible GPIO controller. - "renesas,gpio-rcar": for generic R-Car GPIO controller. - reg: Base address and length of each memory resource used by the GPIO -- cgit v1.2.3