From 646d1a09f05689a3a4781112a3b3e4747d0ba231 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 7 Nov 2018 09:48:28 +0100 Subject: dts: update to v4.20-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/mips/mscc.txt | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'dts/Bindings/mips/mscc.txt') diff --git a/dts/Bindings/mips/mscc.txt b/dts/Bindings/mips/mscc.txt index ae15ec3335..bc817e9846 100644 --- a/dts/Bindings/mips/mscc.txt +++ b/dts/Bindings/mips/mscc.txt @@ -41,3 +41,19 @@ Example: compatible = "mscc,ocelot-cpu-syscon", "syscon"; reg = <0x70000000 0x2c>; }; + +o HSIO regs: + +The SoC has a few registers (HSIO) handling miscellaneous functionalities: +configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and +status, SerDes muxing and a thermal sensor. + +Required properties: +- compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd" +- reg : Should contain registers location and length + +Example: + syscon@10d0000 { + compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd"; + reg = <0x10d0000 0x10000>; + }; -- cgit v1.2.3