From 1dc748b3b202cadf9b799874d9af8d441ee556bc Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 5 Apr 2019 14:51:50 +0200 Subject: dts: update to v5.1-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/mmc/nvidia,tegra20-sdhci.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'dts/Bindings/mmc/nvidia,tegra20-sdhci.txt') diff --git a/dts/Bindings/mmc/nvidia,tegra20-sdhci.txt b/dts/Bindings/mmc/nvidia,tegra20-sdhci.txt index 32b4b4e419..2cecdc71d9 100644 --- a/dts/Bindings/mmc/nvidia,tegra20-sdhci.txt +++ b/dts/Bindings/mmc/nvidia,tegra20-sdhci.txt @@ -39,12 +39,16 @@ sdhci@c8000200 { bus-width = <8>; }; -Optional properties for Tegra210 and Tegra186: +Optional properties for Tegra210, Tegra186 and Tegra194: - pinctrl-names, pinctrl-0, pinctrl-1 : Specify pad voltage configurations. Valid pinctrl-names are "sdmmc-3v3" and "sdmmc-1v8" for controllers supporting multiple voltage levels. The order of names should correspond to the pin configuration states in pinctrl-0 and pinctrl-1. +- pinctrl-names : "sdmmc-3v3-drv" and "sdmmc-1v8-drv" are applicable for + Tegra210 where pad config registers are in the pinmux register domain + for pull-up-strength and pull-down-strength values configuration when + using pads at 3V3 and 1V8 levels. - nvidia,only-1-8-v : The presence of this property indicates that the controller operates at a 1.8 V fixed I/O voltage. - nvidia,pad-autocal-pull-up-offset-3v3, -- cgit v1.2.3