From ab001302c8e1718110bb8839c270d2caa817b214 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 9 Feb 2015 08:45:25 +0100 Subject: dts: update to v3.19-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/mmc/exynos-dw-mshc.txt | 4 ++++ dts/Bindings/mmc/img-dw-mshc.txt | 29 +++++++++++++++++++++++++++++ dts/Bindings/mmc/sdhci-pxa.txt | 7 +++++++ 3 files changed, 40 insertions(+) create mode 100644 dts/Bindings/mmc/img-dw-mshc.txt (limited to 'dts/Bindings/mmc') diff --git a/dts/Bindings/mmc/exynos-dw-mshc.txt b/dts/Bindings/mmc/exynos-dw-mshc.txt index 6cd3525d0e..ee4fc0576c 100644 --- a/dts/Bindings/mmc/exynos-dw-mshc.txt +++ b/dts/Bindings/mmc/exynos-dw-mshc.txt @@ -18,6 +18,10 @@ Required Properties: specific extensions. - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420 specific extensions. + - "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7 + specific extensions. + - "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7 + specific extensions having an SMU. * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface unit (ciu) clock. This property is applicable only for Exynos5 SoC's and diff --git a/dts/Bindings/mmc/img-dw-mshc.txt b/dts/Bindings/mmc/img-dw-mshc.txt new file mode 100644 index 0000000000..85de99fcaa --- /dev/null +++ b/dts/Bindings/mmc/img-dw-mshc.txt @@ -0,0 +1,29 @@ +* Imagination specific extensions to the Synopsys Designware Mobile Storage + Host Controller + +The Synopsys designware mobile storage host controller is used to interface +a SoC with storage medium such as eMMC or SD/MMC cards. This file documents +differences between the core Synopsys dw mshc controller properties described +by synopsys-dw-mshc.txt and the properties used by the Imagination specific +extensions to the Synopsys Designware Mobile Storage Host Controller. + +Required Properties: + +* compatible: should be + - "img,pistachio-dw-mshc": for Pistachio SoCs + +Example: + + mmc@18142000 { + compatible = "img,pistachio-dw-mshc"; + reg = <0x18142000 0x400>; + interrupts = ; + + clocks = <&system_clk>, <&sdhost_clk>; + clock-names = "biu", "ciu"; + + fifo-depth = <0x20>; + bus-width = <4>; + num-slots = <1>; + disable-wp; + }; diff --git a/dts/Bindings/mmc/sdhci-pxa.txt b/dts/Bindings/mmc/sdhci-pxa.txt index 86223c3eda..4dd6deb907 100644 --- a/dts/Bindings/mmc/sdhci-pxa.txt +++ b/dts/Bindings/mmc/sdhci-pxa.txt @@ -12,6 +12,10 @@ Required properties: * for "marvell,armada-380-sdhci", two register areas. The first one for the SDHCI registers themselves, and the second one for the AXI/Mbus bridge registers of the SDHCI unit. +- clocks: Array of clocks required for SDHCI; requires at least one for + I/O clock. +- clock-names: Array of names corresponding to clocks property; shall be + "io" for I/O clock and "core" for optional core clock. Optional properties: - mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning. @@ -23,6 +27,8 @@ sdhci@d4280800 { reg = <0xd4280800 0x800>; bus-width = <8>; interrupts = <27>; + clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>; + clock-names = "io", "core"; non-removable; mrvl,clk-delay-cycles = <31>; }; @@ -32,5 +38,6 @@ sdhci@d8000 { reg = <0xd8000 0x1000>, <0xdc000 0x100>; interrupts = <0 25 0x4>; clocks = <&gateclk 17>; + clock-names = "io"; mrvl,clk-delay-cycles = <0x1F>; }; -- cgit v1.2.3