From 419db1f984f94aaa657f6c2c976afa8fcaecc42d Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 12 Sep 2019 10:51:16 +0200 Subject: dts: update to v5.3-rc7 Signed-off-by: Sascha Hauer --- dts/Bindings/net/dsa/ksz.txt | 1 + dts/Bindings/net/macb.txt | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'dts/Bindings/net') diff --git a/dts/Bindings/net/dsa/ksz.txt b/dts/Bindings/net/dsa/ksz.txt index 4ac21cef37..113e7ac79a 100644 --- a/dts/Bindings/net/dsa/ksz.txt +++ b/dts/Bindings/net/dsa/ksz.txt @@ -12,6 +12,7 @@ Required properties: - "microchip,ksz8565" - "microchip,ksz9893" - "microchip,ksz9563" + - "microchip,ksz8563" Optional properties: diff --git a/dts/Bindings/net/macb.txt b/dts/Bindings/net/macb.txt index 63c73fafe2..0b61a90f15 100644 --- a/dts/Bindings/net/macb.txt +++ b/dts/Bindings/net/macb.txt @@ -15,10 +15,10 @@ Required properties: Use "atmel,sama5d4-gem" for the GEM IP (10/100) available on Atmel sama5d4 SoCs. Use "cdns,zynq-gem" Xilinx Zynq-7xxx SoC. Use "cdns,zynqmp-gem" for Zynq Ultrascale+ MPSoC. - Use "sifive,fu540-macb" for SiFive FU540-C000 SoC. + Use "sifive,fu540-c000-gem" for SiFive FU540-C000 SoC. Or the generic form: "cdns,emac". - reg: Address and length of the register set for the device - For "sifive,fu540-macb", second range is required to specify the + For "sifive,fu540-c000-gem", second range is required to specify the address and length of the registers for GEMGXL Management block. - interrupts: Should contain macb interrupt - phy-mode: See ethernet.txt file in the same directory. -- cgit v1.2.3