From b01786baa849369ff2345c51e63857c952a01130 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Tue, 12 Apr 2022 10:22:44 +0200
Subject: dts: update to v5.18-rc1

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 dts/Bindings/perf/arm,dsu-pmu.yaml       |  2 ++
 dts/Bindings/perf/marvell-cn10k-ddr.yaml | 37 ++++++++++++++++++++++++++++++++
 dts/Bindings/perf/nds32v3-pmu.txt        | 17 ---------------
 3 files changed, 39 insertions(+), 17 deletions(-)
 create mode 100644 dts/Bindings/perf/marvell-cn10k-ddr.yaml
 delete mode 100644 dts/Bindings/perf/nds32v3-pmu.txt

(limited to 'dts/Bindings/perf')

diff --git a/dts/Bindings/perf/arm,dsu-pmu.yaml b/dts/Bindings/perf/arm,dsu-pmu.yaml
index aef63a542f..c87821be15 100644
--- a/dts/Bindings/perf/arm,dsu-pmu.yaml
+++ b/dts/Bindings/perf/arm,dsu-pmu.yaml
@@ -35,6 +35,8 @@ properties:
     $ref: /schemas/types.yaml#/definitions/phandle-array
     minItems: 1
     maxItems: 12
+    items:
+      maxItems: 1
     description: List of phandles for the CPUs connected to this DSU instance.
 
 required:
diff --git a/dts/Bindings/perf/marvell-cn10k-ddr.yaml b/dts/Bindings/perf/marvell-cn10k-ddr.yaml
new file mode 100644
index 0000000000..a18dd0a8c4
--- /dev/null
+++ b/dts/Bindings/perf/marvell-cn10k-ddr.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/perf/marvell-cn10k-ddr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Marvell CN10K DDR performance monitor
+
+maintainers:
+  - Bharat Bhushan <bbhushan2@marvell.com>
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - marvell,cn10k-ddr-pmu
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    bus {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        pmu@87e1c0000000 {
+            compatible = "marvell,cn10k-ddr-pmu";
+            reg = <0x87e1 0xc0000000 0x0 0x10000>;
+        };
+    };
diff --git a/dts/Bindings/perf/nds32v3-pmu.txt b/dts/Bindings/perf/nds32v3-pmu.txt
deleted file mode 100644
index 1bd15785b4..0000000000
--- a/dts/Bindings/perf/nds32v3-pmu.txt
+++ /dev/null
@@ -1,17 +0,0 @@
-* NDS32 Performance Monitor Units
-
-NDS32 core have a PMU for counting cpu and cache events like cache misses.
-The NDS32 PMU representation in the device tree should be done as under:
-
-Required properties:
-
-- compatible :
-	"andestech,nds32v3-pmu"
-
-- interrupts : The interrupt number for NDS32 PMU is 13.
-
-Example:
-pmu{
-	compatible = "andestech,nds32v3-pmu";
-	interrupts = <13>;
-}
-- 
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