From a595ff6eea05b919567f96d71e7e2c7b6236b8ac Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 1 Sep 2014 09:47:17 +0200 Subject: dts: update to v3.17-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/pwm/pwm-rockchip.txt | 20 +++++++++++++++++++ dts/Bindings/pwm/pwm-st.txt | 41 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+) create mode 100644 dts/Bindings/pwm/pwm-rockchip.txt create mode 100644 dts/Bindings/pwm/pwm-st.txt (limited to 'dts/Bindings/pwm') diff --git a/dts/Bindings/pwm/pwm-rockchip.txt b/dts/Bindings/pwm/pwm-rockchip.txt new file mode 100644 index 0000000000..d47d15a6a2 --- /dev/null +++ b/dts/Bindings/pwm/pwm-rockchip.txt @@ -0,0 +1,20 @@ +Rockchip PWM controller + +Required properties: + - compatible: should be "rockchip,-pwm" + "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs + "rockchip,rk3288-pwm": found on RK3288 SoC + "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC + - reg: physical base address and length of the controller's registers + - clocks: phandle and clock specifier of the PWM reference clock + - #pwm-cells: should be 2. See pwm.txt in this directory for a + description of the cell format. + +Example: + + pwm0: pwm@20030000 { + compatible = "rockchip,rk2928-pwm"; + reg = <0x20030000 0x10>; + clocks = <&cru PCLK_PWM01>; + #pwm-cells = <2>; + }; diff --git a/dts/Bindings/pwm/pwm-st.txt b/dts/Bindings/pwm/pwm-st.txt new file mode 100644 index 0000000000..84d2fb807d --- /dev/null +++ b/dts/Bindings/pwm/pwm-st.txt @@ -0,0 +1,41 @@ +STMicroelectronics PWM driver bindings +-------------------------------------- + +Required parameters: +- compatible : "st,pwm" +- #pwm-cells : Number of cells used to specify a PWM. First cell + specifies the per-chip index of the PWM to use and the + second cell is the period in nanoseconds - fixed to 2 + for STiH41x. +- reg : Physical base address and length of the controller's + registers. +- pinctrl-names: Set to "default". +- pinctrl-0: List of phandles pointing to pin configuration nodes + for PWM module. + For Pinctrl properties, please refer to [1]. +- clock-names: Set to "pwm". +- clocks: phandle of the clock used by the PWM module. + For Clk properties, please refer to [2]. + +Optional properties: +- st,pwm-num-chan: Number of available channels. If not passed, the driver + will consider single channel by default. + +[1] Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt +[2] Documentation/devicetree/bindings/clock/clock-bindings.txt + +Example: + +pwm1: pwm@fe510000 { + compatible = "st,pwm"; + reg = <0xfe510000 0x68>; + #pwm-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1_chan0_default + &pinctrl_pwm1_chan1_default + &pinctrl_pwm1_chan2_default + &pinctrl_pwm1_chan3_default>; + clocks = <&clk_sysin>; + clock-names = "pwm"; + st,pwm-num-chan = <4>; +}; -- cgit v1.2.3