From 35f607bc7da71b302fd6bf3d6d48d7ea66df1195 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 11 Sep 2018 08:26:30 +0200 Subject: dts: update to v4.19-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/thermal/exynos-thermal.txt | 1 - 1 file changed, 1 deletion(-) (limited to 'dts/Bindings/thermal/exynos-thermal.txt') diff --git a/dts/Bindings/thermal/exynos-thermal.txt b/dts/Bindings/thermal/exynos-thermal.txt index ad648d93d9..33004ce7e5 100644 --- a/dts/Bindings/thermal/exynos-thermal.txt +++ b/dts/Bindings/thermal/exynos-thermal.txt @@ -13,7 +13,6 @@ Exynos5420 (Must pass triminfo base and triminfo clock) "samsung,exynos5433-tmu" "samsung,exynos7-tmu" -- interrupt-parent : The phandle for the interrupt controller - reg : Address range of the thermal registers. For soc's which has multiple instances of TMU and some registers are shared across all TMU's like interrupt related then 2 set of register has to supplied. First set -- cgit v1.2.3