From 3b5c343782dea7827694cafd53fed08645cb6abf Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 28 Oct 2016 08:52:27 +0200 Subject: dts: update to v4.9-rc2 Signed-off-by: Sascha Hauer --- dts/Bindings/timer/jcore,pit.txt | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 dts/Bindings/timer/jcore,pit.txt (limited to 'dts/Bindings/timer/jcore,pit.txt') diff --git a/dts/Bindings/timer/jcore,pit.txt b/dts/Bindings/timer/jcore,pit.txt new file mode 100644 index 0000000000..af5dd35469 --- /dev/null +++ b/dts/Bindings/timer/jcore,pit.txt @@ -0,0 +1,24 @@ +J-Core Programmable Interval Timer and Clocksource + +Required properties: + +- compatible: Must be "jcore,pit". + +- reg: Memory region(s) for timer/clocksource registers. For SMP, + there should be one region per cpu, indexed by the sequential, + zero-based hardware cpu number. + +- interrupts: An interrupt to assign for the timer. The actual pit + core is integrated with the aic and allows the timer interrupt + assignment to be programmed by software, but this property is + required in order to reserve an interrupt number that doesn't + conflict with other devices. + + +Example: + +timer@200 { + compatible = "jcore,pit"; + reg = < 0x200 0x30 0x500 0x30 >; + interrupts = < 0x48 >; +}; -- cgit v1.2.3