From 86186c232241b607f84cc266a6cda49160f44948 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 13 Jun 2016 07:31:46 +0200 Subject: dts: update to v4.7-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/timer/snps,arc-timer.txt | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 dts/Bindings/timer/snps,arc-timer.txt (limited to 'dts/Bindings/timer/snps,arc-timer.txt') diff --git a/dts/Bindings/timer/snps,arc-timer.txt b/dts/Bindings/timer/snps,arc-timer.txt new file mode 100644 index 0000000000..4ef024630d --- /dev/null +++ b/dts/Bindings/timer/snps,arc-timer.txt @@ -0,0 +1,31 @@ +Synopsys ARC Local Timer with Interrupt Capabilities +- Found on all ARC CPUs (ARC700/ARCHS) +- Can be optionally programmed to interrupt on Limit +- Two idential copies TIMER0 and TIMER1 exist in ARC cores and historically + TIMER0 used as clockevent provider (true for all ARC cores) + TIMER1 used for clocksource (mandatory for ARC700, optional for ARC HS) + +Required properties: + +- compatible : should be "snps,arc-timer" +- interrupts : single Interrupt going into parent intc + (16 for ARCHS cores, 3 for ARC700 cores) +- clocks : phandle to the source clock + +Optional properties: + +- interrupt-parent : phandle to parent intc + +Example: + + timer0 { + compatible = "snps,arc-timer"; + interrupts = <3>; + interrupt-parent = <&core_intc>; + clocks = <&core_clk>; + }; + + timer1 { + compatible = "snps,arc-timer"; + clocks = <&core_clk>; + }; -- cgit v1.2.3