From 3d3f1303b50afe5b98d0d906794051fb084069fc Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 10 May 2019 08:42:54 +0200 Subject: dts: update to v5.1-rc4 Signed-off-by: Sascha Hauer --- dts/Bindings/arm/cpus.yaml | 2 +- dts/Bindings/hwmon/adc128d818.txt | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'dts/Bindings') diff --git a/dts/Bindings/arm/cpus.yaml b/dts/Bindings/arm/cpus.yaml index 365dcf384d..82dd7582e9 100644 --- a/dts/Bindings/arm/cpus.yaml +++ b/dts/Bindings/arm/cpus.yaml @@ -228,7 +228,7 @@ patternProperties: - renesas,r9a06g032-smp - rockchip,rk3036-smp - rockchip,rk3066-smp - - socionext,milbeaut-m10v-smp + - socionext,milbeaut-m10v-smp - ste,dbx500-smp cpu-release-addr: diff --git a/dts/Bindings/hwmon/adc128d818.txt b/dts/Bindings/hwmon/adc128d818.txt index 08bab0e94d..d0ae46d7ba 100644 --- a/dts/Bindings/hwmon/adc128d818.txt +++ b/dts/Bindings/hwmon/adc128d818.txt @@ -26,7 +26,7 @@ Required node properties: Optional node properties: - - ti,mode: Operation mode (see above). + - ti,mode: Operation mode (u8) (see above). Example (operation mode 2): @@ -34,5 +34,5 @@ Example (operation mode 2): adc128d818@1d { compatible = "ti,adc128d818"; reg = <0x1d>; - ti,mode = <2>; + ti,mode = /bits/ 8 <2>; }; -- cgit v1.2.3