From 79c4a86c87cdcd64b5cc5b3ed0db75d7530b6aee Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 27 Jun 2017 10:16:12 +0200 Subject: dts: update to v4.12-rc7 Signed-off-by: Sascha Hauer --- dts/Bindings/clock/sunxi-ccu.txt | 7 ++++--- dts/Bindings/gpio/gpio-mvebu.txt | 6 +++--- dts/Bindings/mfd/stm32-timers.txt | 2 +- dts/Bindings/net/dsa/b53.txt | 2 +- dts/Bindings/net/smsc911x.txt | 1 + 5 files changed, 10 insertions(+), 8 deletions(-) (limited to 'dts/Bindings') diff --git a/dts/Bindings/clock/sunxi-ccu.txt b/dts/Bindings/clock/sunxi-ccu.txt index e9c5a1d983..f465647a4d 100644 --- a/dts/Bindings/clock/sunxi-ccu.txt +++ b/dts/Bindings/clock/sunxi-ccu.txt @@ -22,7 +22,8 @@ Required properties : - #clock-cells : must contain 1 - #reset-cells : must contain 1 -For the PRCM CCUs on H3/A64, one more clock is needed: +For the PRCM CCUs on H3/A64, two more clocks are needed: +- "pll-periph": the SoC's peripheral PLL from the main CCU - "iosc": the SoC's internal frequency oscillator Example for generic CCU: @@ -39,8 +40,8 @@ Example for PRCM CCU: r_ccu: clock@01f01400 { compatible = "allwinner,sun50i-a64-r-ccu"; reg = <0x01f01400 0x100>; - clocks = <&osc24M>, <&osc32k>, <&iosc>; - clock-names = "hosc", "losc", "iosc"; + clocks = <&osc24M>, <&osc32k>, <&iosc>, <&ccu CLK_PLL_PERIPH0>; + clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <1>; #reset-cells = <1>; }; diff --git a/dts/Bindings/gpio/gpio-mvebu.txt b/dts/Bindings/gpio/gpio-mvebu.txt index 42c3bb2d53..01e331a5f3 100644 --- a/dts/Bindings/gpio/gpio-mvebu.txt +++ b/dts/Bindings/gpio/gpio-mvebu.txt @@ -41,9 +41,9 @@ Required properties: Optional properties: In order to use the GPIO lines in PWM mode, some additional optional -properties are required. Only Armada 370 and XP support these properties. +properties are required. -- compatible: Must contain "marvell,armada-370-xp-gpio" +- compatible: Must contain "marvell,armada-370-gpio" - reg: an additional register set is needed, for the GPIO Blink Counter on/off registers. @@ -71,7 +71,7 @@ Example: }; gpio1: gpio@18140 { - compatible = "marvell,armada-370-xp-gpio"; + compatible = "marvell,armada-370-gpio"; reg = <0x18140 0x40>, <0x181c8 0x08>; reg-names = "gpio", "pwm"; ngpios = <17>; diff --git a/dts/Bindings/mfd/stm32-timers.txt b/dts/Bindings/mfd/stm32-timers.txt index bbd083f560..1db6e0057a 100644 --- a/dts/Bindings/mfd/stm32-timers.txt +++ b/dts/Bindings/mfd/stm32-timers.txt @@ -31,7 +31,7 @@ Example: compatible = "st,stm32-timers"; reg = <0x40010000 0x400>; clocks = <&rcc 0 160>; - clock-names = "clk_int"; + clock-names = "int"; pwm { compatible = "st,stm32-pwm"; diff --git a/dts/Bindings/net/dsa/b53.txt b/dts/Bindings/net/dsa/b53.txt index d6c6e41648..8ec2ca21ad 100644 --- a/dts/Bindings/net/dsa/b53.txt +++ b/dts/Bindings/net/dsa/b53.txt @@ -34,7 +34,7 @@ Required properties: "brcm,bcm6328-switch" "brcm,bcm6368-switch" and the mandatory "brcm,bcm63xx-switch" -See Documentation/devicetree/bindings/dsa/dsa.txt for a list of additional +See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional required and optional properties. Examples: diff --git a/dts/Bindings/net/smsc911x.txt b/dts/Bindings/net/smsc911x.txt index 16c3a9501f..acfafc8e14 100644 --- a/dts/Bindings/net/smsc911x.txt +++ b/dts/Bindings/net/smsc911x.txt @@ -27,6 +27,7 @@ Optional properties: of the device. On many systems this is wired high so the device goes out of reset at power-on, but if it is under program control, this optional GPIO can wake up in response to it. +- vdd33a-supply, vddvario-supply : 3.3V analog and IO logic power supplies Examples: -- cgit v1.2.3