From 574eed3f6fcf056aa4c9e46c4b5224e3f7844d8d Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 19 Dec 2019 05:46:54 +0100 Subject: dts: update to v5.5-rc1 Signed-off-by: Sascha Hauer --- dts/src/arc/axc001.dtsi | 6 ++++ dts/src/arc/axs101.dts | 2 +- dts/src/arc/axs103_idu.dts | 2 +- dts/src/arc/axs10x_mb.dtsi | 11 ++++---- dts/src/arc/haps_hs.dts | 15 ++++++---- dts/src/arc/haps_hs_idu.dts | 1 - dts/src/arc/nsim_700.dts | 36 ++++++++---------------- dts/src/arc/nsim_hs.dts | 67 --------------------------------------------- dts/src/arc/nsim_hs_idu.dts | 65 ------------------------------------------- 9 files changed, 34 insertions(+), 171 deletions(-) delete mode 100644 dts/src/arc/nsim_hs.dts delete mode 100644 dts/src/arc/nsim_hs_idu.dts (limited to 'dts/src/arc') diff --git a/dts/src/arc/axc001.dtsi b/dts/src/arc/axc001.dtsi index 6ec1fcdfc0..79ec27c043 100644 --- a/dts/src/arc/axc001.dtsi +++ b/dts/src/arc/axc001.dtsi @@ -28,6 +28,12 @@ clock-frequency = <750000000>; }; + input_clk: input-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <33333333>; + }; + core_intc: arc700-intc@cpu { compatible = "snps,arc700-intc"; interrupt-controller; diff --git a/dts/src/arc/axs101.dts b/dts/src/arc/axs101.dts index 305a7f9658..c4cfc5f4f4 100644 --- a/dts/src/arc/axs101.dts +++ b/dts/src/arc/axs101.dts @@ -14,6 +14,6 @@ compatible = "snps,axs101", "snps,arc-sdp"; chosen { - bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0 video=1280x720@60 print-fatal-signals=1"; + bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0 print-fatal-signals=1"; }; }; diff --git a/dts/src/arc/axs103_idu.dts b/dts/src/arc/axs103_idu.dts index 46c9136cbf..a934b92a8c 100644 --- a/dts/src/arc/axs103_idu.dts +++ b/dts/src/arc/axs103_idu.dts @@ -17,6 +17,6 @@ compatible = "snps,axs103", "snps,arc-sdp"; chosen { - bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 print-fatal-signals=1 consoleblank=0 video=1280x720@60"; + bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 print-fatal-signals=1 consoleblank=0"; }; }; diff --git a/dts/src/arc/axs10x_mb.dtsi b/dts/src/arc/axs10x_mb.dtsi index 08bcfed6b8..f9a5c9ddca 100644 --- a/dts/src/arc/axs10x_mb.dtsi +++ b/dts/src/arc/axs10x_mb.dtsi @@ -61,12 +61,13 @@ clock-frequency = <25000000>; #clock-cells = <0>; }; + }; - pguclk: pguclk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <74250000>; - }; + pguclk: pguclk@10080 { + compatible = "snps,axs10x-pgu-pll-clock"; + reg = <0x10080 0x10>, <0x110 0x10>; + #clock-cells = <0>; + clocks = <&input_clk>; }; gmac: ethernet@18000 { diff --git a/dts/src/arc/haps_hs.dts b/dts/src/arc/haps_hs.dts index 44bc522fde..60d578e278 100644 --- a/dts/src/arc/haps_hs.dts +++ b/dts/src/arc/haps_hs.dts @@ -9,13 +9,15 @@ / { model = "snps,zebu_hs"; compatible = "snps,zebu_hs"; - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; interrupt-parent = <&core_intc>; memory { device_type = "memory"; - reg = <0x80000000 0x20000000>; /* 512 */ + /* CONFIG_LINUX_RAM_BASE needs to match low mem start */ + reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MB low mem */ + 0x1 0x00000000 0x0 0x40000000>; /* 1 GB highmem */ }; chosen { @@ -31,8 +33,9 @@ #address-cells = <1>; #size-cells = <1>; - /* child and parent address space 1:1 mapped */ - ranges; + /* only perip space at end of low mem accessible + bus addr, parent bus addr, size */ + ranges = <0x80000000 0x0 0x80000000 0x80000000>; core_clk: core_clk { #clock-cells = <0>; @@ -47,7 +50,7 @@ }; uart0: serial@f0000000 { - compatible = "ns8250"; + compatible = "ns16550a"; reg = <0xf0000000 0x2000>; interrupts = <24>; clock-frequency = <50000000>; diff --git a/dts/src/arc/haps_hs_idu.dts b/dts/src/arc/haps_hs_idu.dts index 4d6971cf5f..738c76cd07 100644 --- a/dts/src/arc/haps_hs_idu.dts +++ b/dts/src/arc/haps_hs_idu.dts @@ -54,7 +54,6 @@ }; uart0: serial@f0000000 { - /* compatible = "ns8250"; Doesn't use FIFOs */ compatible = "ns16550a"; reg = <0xf0000000 0x2000>; interrupt-parent = <&idu_intc>; diff --git a/dts/src/arc/nsim_700.dts b/dts/src/arc/nsim_700.dts index 63dbaab124..f8832a15e1 100644 --- a/dts/src/arc/nsim_700.dts +++ b/dts/src/arc/nsim_700.dts @@ -14,11 +14,11 @@ interrupt-parent = <&core_intc>; chosen { - bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1"; + bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 print-fatal-signals=1"; }; aliases { - serial0 = &arcuart0; + serial0 = &uart0; }; fpga { @@ -41,29 +41,15 @@ #interrupt-cells = <1>; }; - arcuart0: serial@c0fc1000 { - compatible = "snps,arc-uart"; - reg = <0xc0fc1000 0x100>; - interrupts = <5>; - clock-frequency = <80000000>; - current-speed = <115200>; - status = "okay"; - }; - - ethernet@c0fc2000 { - compatible = "snps,arc-emac"; - reg = <0xc0fc2000 0x3c>; - interrupts = <6>; - mac-address = [ 00 11 22 33 44 55 ]; - clock-frequency = <80000000>; - max-speed = <100>; - phy = <&phy0>; - - #address-cells = <1>; - #size-cells = <0>; - phy0: ethernet-phy@0 { - reg = <1>; - }; + uart0: serial@f0000000 { + compatible = "ns16550a"; + reg = <0xf0000000 0x2000>; + interrupts = <24>; + clock-frequency = <50000000>; + baud = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + no-loopback-test = <1>; }; arcpct0: pct { diff --git a/dts/src/arc/nsim_hs.dts b/dts/src/arc/nsim_hs.dts deleted file mode 100644 index 851798a5f4..0000000000 --- a/dts/src/arc/nsim_hs.dts +++ /dev/null @@ -1,67 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) - */ -/dts-v1/; - -/include/ "skeleton_hs.dtsi" - -/ { - model = "snps,nsim_hs"; - compatible = "snps,nsim_hs"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&core_intc>; - - memory { - device_type = "memory"; - /* CONFIG_LINUX_RAM_BASE needs to match low mem start */ - reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MB low mem */ - 0x1 0x00000000 0x0 0x40000000>; /* 1 GB highmem */ - }; - - chosen { - bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1"; - }; - - aliases { - serial0 = &arcuart0; - }; - - fpga { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - - /* only perip space at end of low mem accessible - bus addr, parent bus addr, size */ - ranges = <0x80000000 0x0 0x80000000 0x80000000>; - - core_clk: core_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <80000000>; - }; - - core_intc: core-interrupt-controller { - compatible = "snps,archs-intc"; - interrupt-controller; - #interrupt-cells = <1>; - }; - - arcuart0: serial@c0fc1000 { - compatible = "snps,arc-uart"; - reg = <0xc0fc1000 0x100>; - interrupts = <24>; - clock-frequency = <80000000>; - current-speed = <115200>; - status = "okay"; - }; - - arcpct0: pct { - compatible = "snps,archs-pct"; - #interrupt-cells = <1>; - interrupts = <20>; - }; - }; -}; diff --git a/dts/src/arc/nsim_hs_idu.dts b/dts/src/arc/nsim_hs_idu.dts deleted file mode 100644 index 6c559a0bd1..0000000000 --- a/dts/src/arc/nsim_hs_idu.dts +++ /dev/null @@ -1,65 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) - */ -/dts-v1/; - -/include/ "skeleton_hs_idu.dtsi" - -/ { - model = "snps,nsim_hs-smp"; - compatible = "snps,nsim_hs"; - interrupt-parent = <&core_intc>; - - chosen { - bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1"; - }; - - aliases { - serial0 = &arcuart0; - }; - - fpga { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - - /* child and parent address space 1:1 mapped */ - ranges; - - core_clk: core_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <80000000>; - }; - - core_intc: core-interrupt-controller { - compatible = "snps,archs-intc"; - interrupt-controller; - #interrupt-cells = <1>; - }; - - idu_intc: idu-interrupt-controller { - compatible = "snps,archs-idu-intc"; - interrupt-controller; - interrupt-parent = <&core_intc>; - #interrupt-cells = <1>; - }; - - arcuart0: serial@c0fc1000 { - compatible = "snps,arc-uart"; - reg = <0xc0fc1000 0x100>; - interrupt-parent = <&idu_intc>; - interrupts = <0>; - clock-frequency = <80000000>; - current-speed = <115200>; - status = "okay"; - }; - - arcpct0: pct { - compatible = "snps,archs-pct"; - #interrupt-cells = <1>; - interrupts = <20>; - }; - }; -}; -- cgit v1.2.3