From 87360e3dd42bb627a9f2611f961728c0789e1c21 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 8 Jul 2015 14:44:21 +0200 Subject: dts: update to v4.2-rc1 Signed-off-by: Sascha Hauer --- dts/src/arm/lpc4350.dtsi | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 dts/src/arm/lpc4350.dtsi (limited to 'dts/src/arm/lpc4350.dtsi') diff --git a/dts/src/arm/lpc4350.dtsi b/dts/src/arm/lpc4350.dtsi new file mode 100644 index 0000000000..c4422f5870 --- /dev/null +++ b/dts/src/arm/lpc4350.dtsi @@ -0,0 +1,39 @@ +/* + * NXP LPC4350 and LPC4330 SoC + * + * Copyright 2015 Ariel D'Alessandro + * + * This code is released using a dual license strategy: BSD/GPL + * You can choose the licence that better fits your requirements. + * + * Released under the terms of 3-clause BSD License + * Released under the terms of GNU General Public License Version 2.0 + * + */ + +/ { + compatible = "nxp,lpc4350", "nxp,lpc4330"; + + cpus { + cpu@0 { + compatible = "arm,cortex-m4"; + }; + }; + + soc { + sram0: sram@10000000 { + compatible = "mmio-sram"; + reg = <0x10000000 0x20000>; /* 96 + 32 KiB local SRAM */ + }; + + sram1: sram@10080000 { + compatible = "mmio-sram"; + reg = <0x10080000 0x12000>; /* 64 + 8 KiB local SRAM */ + }; + + sram2: sram@20000000 { + compatible = "mmio-sram"; + reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */ + }; + }; +}; -- cgit v1.2.3