From 6bef4dd5953377d6e25bb1a57f8e2a91ce5ecca0 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 5 May 2014 10:03:29 +0200 Subject: dts: update to v3.15-rc3 Signed-off-by: Sascha Hauer --- dts/src/arm/omap5.dtsi | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'dts/src/arm/omap5.dtsi') diff --git a/dts/src/arm/omap5.dtsi b/dts/src/arm/omap5.dtsi index 6f3de22fb2..f8c9855ce5 100644 --- a/dts/src/arm/omap5.dtsi +++ b/dts/src/arm/omap5.dtsi @@ -93,7 +93,7 @@ }; /* - * The soc node represents the soc top level view. It is uses for IPs + * The soc node represents the soc top level view. It is used for IPs * that are not memory mapped in the MPU view or for the MPU itself. */ soc { @@ -107,7 +107,7 @@ /* * XXX: Use a flat representation of the OMAP3 interconnect. * The real OMAP interconnect network is quite complex. - * Since that will not bring real advantage to represent that in DT for + * Since it will not bring real advantage to represent that in DT for * the moment, just use a fake OCP bus entry to represent the whole bus * hierarchy. */ @@ -813,6 +813,12 @@ <0x4a084c00 0x40>; reg-names = "phy_rx", "phy_tx", "pll_ctrl"; ctrl-module = <&omap_control_usb3phy>; + clocks = <&usb_phy_cm_clk32k>, + <&sys_clkin>, + <&usb_otg_ss_refclk960m>; + clock-names = "wkupclk", + "sysclk", + "refclk"; #phy-cells = <0>; }; }; -- cgit v1.2.3