From 86186c232241b607f84cc266a6cda49160f44948 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 13 Jun 2016 07:31:46 +0200 Subject: dts: update to v4.7-rc1 Signed-off-by: Sascha Hauer --- dts/src/arm/vfxxx.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'dts/src/arm/vfxxx.dtsi') diff --git a/dts/src/arm/vfxxx.dtsi b/dts/src/arm/vfxxx.dtsi index 5c0975451d..2c13ec696a 100644 --- a/dts/src/arm/vfxxx.dtsi +++ b/dts/src/arm/vfxxx.dtsi @@ -95,6 +95,7 @@ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; + reg = <0x40000000 0x00070000>; ranges; mscm_cpucfg: cpucfg@40001000 { @@ -310,6 +311,14 @@ <20000000>; }; + tcon0: timing-controller@4003d000 { + compatible = "fsl,vf610-tcon"; + reg = <0x4003d000 0x1000>; + clocks = <&clks VF610_CLK_TCON0>; + clock-names = "ipg"; + status = "disabled"; + }; + wdoga5: wdog@4003e000 { compatible = "fsl,vf610-wdt", "fsl,imx21-wdt"; reg = <0x4003e000 0x1000>; @@ -415,6 +424,17 @@ status = "disabled"; }; + dcu0: dcu@40058000 { + compatible = "fsl,vf610-dcu"; + reg = <0x40058000 0x1200>; + interrupts = <30 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks VF610_CLK_DCU0>, + <&clks VF610_CLK_DCU0_DIV>; + clock-names = "dcu", "pix"; + fsl,tcon = <&tcon0>; + status = "disabled"; + }; + i2c0: i2c@40066000 { #address-cells = <1>; #size-cells = <0>; @@ -481,6 +501,7 @@ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; + reg = <0x40080000 0x0007f000>; ranges; edma1: dma-controller@40098000 { -- cgit v1.2.3