From 1dc748b3b202cadf9b799874d9af8d441ee556bc Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 5 Apr 2019 14:51:50 +0200 Subject: dts: update to v5.1-rc1 Signed-off-by: Sascha Hauer --- .../arm64/allwinner/sun50i-a64-bananapi-m64.dts | 8 ++++ dts/src/arm64/allwinner/sun50i-a64-nanopi-a64.dts | 4 ++ dts/src/arm64/allwinner/sun50i-a64-olinuxino.dts | 8 ++++ .../arm64/allwinner/sun50i-a64-orangepi-win.dts | 8 ++++ dts/src/arm64/allwinner/sun50i-a64-pine64.dts | 8 ++++ dts/src/arm64/allwinner/sun50i-a64-teres-i.dts | 10 ++++- dts/src/arm64/allwinner/sun50i-a64.dtsi | 38 +++++++++++++++++-- .../allwinner/sun50i-h5-libretech-all-h3-cc.dts | 4 ++ dts/src/arm64/allwinner/sun50i-h5.dtsi | 8 ++-- dts/src/arm64/allwinner/sun50i-h6.dtsi | 44 ++++++++++++++-------- 10 files changed, 116 insertions(+), 24 deletions(-) (limited to 'dts/src/arm64/allwinner') diff --git a/dts/src/arm64/allwinner/sun50i-a64-bananapi-m64.dts b/dts/src/arm64/allwinner/sun50i-a64-bananapi-m64.dts index 9d0afd7d50..7793ebb5d2 100644 --- a/dts/src/arm64/allwinner/sun50i-a64-bananapi-m64.dts +++ b/dts/src/arm64/allwinner/sun50i-a64-bananapi-m64.dts @@ -222,6 +222,14 @@ #include "axp803.dtsi" +&ac_power_supply { + status = "okay"; +}; + +&battery_power_supply { + status = "okay"; +}; + ®_aldo1 { /* * This regulator also drives the PE pingroup GPIOs, diff --git a/dts/src/arm64/allwinner/sun50i-a64-nanopi-a64.dts b/dts/src/arm64/allwinner/sun50i-a64-nanopi-a64.dts index 31884dbc88..f4e78531f6 100644 --- a/dts/src/arm64/allwinner/sun50i-a64-nanopi-a64.dts +++ b/dts/src/arm64/allwinner/sun50i-a64-nanopi-a64.dts @@ -186,6 +186,10 @@ #include "axp803.dtsi" +&ac_power_supply { + status = "okay"; +}; + ®_aldo2 { regulator-always-on; regulator-min-microvolt = <1800000>; diff --git a/dts/src/arm64/allwinner/sun50i-a64-olinuxino.dts b/dts/src/arm64/allwinner/sun50i-a64-olinuxino.dts index f7a4bccaa5..01a9a52eda 100644 --- a/dts/src/arm64/allwinner/sun50i-a64-olinuxino.dts +++ b/dts/src/arm64/allwinner/sun50i-a64-olinuxino.dts @@ -177,6 +177,14 @@ #include "axp803.dtsi" +&ac_power_supply { + status = "okay"; +}; + +&battery_power_supply { + status = "okay"; +}; + ®_aldo1 { regulator-always-on; regulator-min-microvolt = <2800000>; diff --git a/dts/src/arm64/allwinner/sun50i-a64-orangepi-win.dts b/dts/src/arm64/allwinner/sun50i-a64-orangepi-win.dts index 8974b5a1d3..510f661229 100644 --- a/dts/src/arm64/allwinner/sun50i-a64-orangepi-win.dts +++ b/dts/src/arm64/allwinner/sun50i-a64-orangepi-win.dts @@ -194,6 +194,14 @@ #include "axp803.dtsi" +&ac_power_supply { + status = "okay"; +}; + +&battery_power_supply { + status = "okay"; +}; + ®_aldo1 { regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; diff --git a/dts/src/arm64/allwinner/sun50i-a64-pine64.dts b/dts/src/arm64/allwinner/sun50i-a64-pine64.dts index 216f2f5db5..c0b9cc7a6b 100644 --- a/dts/src/arm64/allwinner/sun50i-a64-pine64.dts +++ b/dts/src/arm64/allwinner/sun50i-a64-pine64.dts @@ -169,6 +169,14 @@ #include "axp803.dtsi" +&ac_power_supply { + status = "okay"; +}; + +&battery_power_supply { + status = "okay"; +}; + ®_aldo2 { regulator-always-on; regulator-min-microvolt = <1800000>; diff --git a/dts/src/arm64/allwinner/sun50i-a64-teres-i.dts b/dts/src/arm64/allwinner/sun50i-a64-teres-i.dts index c455b24dd0..7b7b14ba58 100644 --- a/dts/src/arm64/allwinner/sun50i-a64-teres-i.dts +++ b/dts/src/arm64/allwinner/sun50i-a64-teres-i.dts @@ -145,6 +145,14 @@ #include "axp803.dtsi" +&ac_power_supply { + status = "okay"; +}; + +&battery_power_supply { + status = "okay"; +}; + ®_aldo1 { regulator-always-on; regulator-min-microvolt = <2800000>; @@ -239,7 +247,7 @@ }; /* - * The A64 chip cannot work without this regulator off, although + * The A64 chip cannot work with this regulator off, although * it seems to be only driving the AR100 core. * Maybe we don't still know well about CPUs domain. */ diff --git a/dts/src/arm64/allwinner/sun50i-a64.dtsi b/dts/src/arm64/allwinner/sun50i-a64.dtsi index 2abb335145..e628d06393 100644 --- a/dts/src/arm64/allwinner/sun50i-a64.dtsi +++ b/dts/src/arm64/allwinner/sun50i-a64.dtsi @@ -84,7 +84,7 @@ #size-cells = <0>; cpu0: cpu@0 { - compatible = "arm,cortex-a53", "arm,armv8"; + compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <0>; enable-method = "psci"; @@ -92,7 +92,7 @@ }; cpu1: cpu@1 { - compatible = "arm,cortex-a53", "arm,armv8"; + compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <1>; enable-method = "psci"; @@ -100,7 +100,7 @@ }; cpu2: cpu@2 { - compatible = "arm,cortex-a53", "arm,armv8"; + compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <2>; enable-method = "psci"; @@ -108,7 +108,7 @@ }; cpu3: cpu@3 { - compatible = "arm,cortex-a53", "arm,armv8"; + compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <3>; enable-method = "psci"; @@ -142,6 +142,15 @@ clock-output-names = "ext-osc32k"; }; + pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + psci { compatible = "arm,psci-0.2"; method = "smc"; @@ -191,6 +200,7 @@ timer { compatible = "arm,armv8-timer"; + allwinner,erratum-unknown1; interrupts = , ; + csi_pins: csi-pins { + pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6", + "PE7", "PE8", "PE9", "PE10", "PE11"; + function = "csi"; + }; + i2c0_pins: i2c0_pins { pins = "PH0", "PH1"; function = "i2c0"; @@ -916,6 +932,20 @@ status = "disabled"; }; + csi: csi@1cb0000 { + compatible = "allwinner,sun50i-a64-csi"; + reg = <0x01cb0000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI_SCLK>, + <&ccu CLK_DRAM_CSI>; + clock-names = "bus", "mod", "ram"; + resets = <&ccu RST_BUS_CSI>; + pinctrl-names = "default"; + pinctrl-0 = <&csi_pins>; + status = "disabled"; + }; + hdmi: hdmi@1ee0000 { compatible = "allwinner,sun50i-a64-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi"; diff --git a/dts/src/arm64/allwinner/sun50i-h5-libretech-all-h3-cc.dts b/dts/src/arm64/allwinner/sun50i-h5-libretech-all-h3-cc.dts index 95e113ce86..d68bdfea22 100644 --- a/dts/src/arm64/allwinner/sun50i-h5-libretech-all-h3-cc.dts +++ b/dts/src/arm64/allwinner/sun50i-h5-libretech-all-h3-cc.dts @@ -12,3 +12,7 @@ model = "Libre Computer Board ALL-H3-CC H5"; compatible = "libretech,all-h3-cc-h5", "allwinner,sun50i-h5"; }; + +&mmc2 { + mmc-ddr-3_3v; +}; diff --git a/dts/src/arm64/allwinner/sun50i-h5.dtsi b/dts/src/arm64/allwinner/sun50i-h5.dtsi index c22621b4b8..96acafd3a8 100644 --- a/dts/src/arm64/allwinner/sun50i-h5.dtsi +++ b/dts/src/arm64/allwinner/sun50i-h5.dtsi @@ -48,28 +48,28 @@ #size-cells = <0>; cpu0: cpu@0 { - compatible = "arm,cortex-a53", "arm,armv8"; + compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <0>; enable-method = "psci"; }; cpu@1 { - compatible = "arm,cortex-a53", "arm,armv8"; + compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <1>; enable-method = "psci"; }; cpu@2 { - compatible = "arm,cortex-a53", "arm,armv8"; + compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <2>; enable-method = "psci"; }; cpu@3 { - compatible = "arm,cortex-a53", "arm,armv8"; + compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <3>; enable-method = "psci"; diff --git a/dts/src/arm64/allwinner/sun50i-h6.dtsi b/dts/src/arm64/allwinner/sun50i-h6.dtsi index d93a7add67..c9e861a50a 100644 --- a/dts/src/arm64/allwinner/sun50i-h6.dtsi +++ b/dts/src/arm64/allwinner/sun50i-h6.dtsi @@ -22,28 +22,28 @@ #size-cells = <0>; cpu0: cpu@0 { - compatible = "arm,cortex-a53", "arm,armv8"; + compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <0>; enable-method = "psci"; }; cpu1: cpu@1 { - compatible = "arm,cortex-a53", "arm,armv8"; + compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <1>; enable-method = "psci"; }; cpu2: cpu@2 { - compatible = "arm,cortex-a53", "arm,armv8"; + compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <2>; enable-method = "psci"; }; cpu3: cpu@3 { - compatible = "arm,cortex-a53", "arm,armv8"; + compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <3>; enable-method = "psci"; @@ -167,6 +167,20 @@ reg = <0x0000 0x1e000>; }; }; + + sram_c1: sram@1a00000 { + compatible = "mmio-sram"; + reg = <0x01a00000 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x01a00000 0x200000>; + + ve_sram: sram-section@0 { + compatible = "allwinner,sun50i-h6-sram-c1", + "allwinner,sun4i-a10-sram-c1"; + reg = <0x000000 0x200000>; + }; + }; }; ccu: clock@3001000 { @@ -178,17 +192,6 @@ #reset-cells = <1>; }; - gic: interrupt-controller@3021000 { - compatible = "arm,gic-400"; - reg = <0x03021000 0x1000>, - <0x03022000 0x2000>, - <0x03024000 0x2000>, - <0x03026000 0x2000>; - interrupts = ; - interrupt-controller; - #interrupt-cells = <3>; - }; - pio: pinctrl@300b000 { compatible = "allwinner,sun50i-h6-pinctrl"; reg = <0x0300b000 0x400>; @@ -239,6 +242,17 @@ }; }; + gic: interrupt-controller@3021000 { + compatible = "arm,gic-400"; + reg = <0x03021000 0x1000>, + <0x03022000 0x2000>, + <0x03024000 0x2000>, + <0x03026000 0x2000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + }; + mmc0: mmc@4020000 { compatible = "allwinner,sun50i-h6-mmc", "allwinner,sun50i-a64-mmc"; -- cgit v1.2.3