From 618948e4e5b399295bbe56bfb30891790cae9232 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 4 Oct 2021 16:10:53 +0200 Subject: dts: update to v5.15-rc1 Signed-off-by: Sascha Hauer --- dts/src/arm64/renesas/r8a779m3-ulcb.dts | 45 +++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 dts/src/arm64/renesas/r8a779m3-ulcb.dts (limited to 'dts/src/arm64/renesas/r8a779m3-ulcb.dts') diff --git a/dts/src/arm64/renesas/r8a779m3-ulcb.dts b/dts/src/arm64/renesas/r8a779m3-ulcb.dts new file mode 100644 index 0000000000..8f215a0b77 --- /dev/null +++ b/dts/src/arm64/renesas/r8a779m3-ulcb.dts @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: (GPL-2.0 or MIT) +/* + * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) with R-Car M3e-2G + * + * Copyright (C) 2021 Glider bv + * + * Based on r8a77961-ulcb.dts + * Copyright (C) 2020 Renesas Electronics Corp. + */ + +/dts-v1/; +#include "r8a779m3.dtsi" +#include "ulcb.dtsi" + +/ { + model = "Renesas M3ULCB board based on r8a779m3"; + compatible = "renesas,m3ulcb", "renesas,r8a779m3", "renesas,r8a77961"; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x78000000>; + }; + + memory@480000000 { + device_type = "memory"; + reg = <0x4 0x80000000 0x0 0x80000000>; + }; + + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x1 0x00000000>; + }; +}; + +&du { + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 722>, + <&versaclock5 1>, + <&versaclock5 3>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.2", + "dclkin.0", "dclkin.1", "dclkin.2"; +}; -- cgit v1.2.3