From 5f3e773ca4830daf71c7b5eee0c6b1dfe4d09c08 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 27 Jan 2022 11:22:53 +0100 Subject: dts: update to v5.17-rc1 Signed-off-by: Sascha Hauer --- dts/src/mips/brcm/bcm7425.dtsi | 30 ++++++++++++++++++++++++++++++ dts/src/mips/brcm/bcm7435.dtsi | 30 ++++++++++++++++++++++++++++++ dts/src/mips/brcm/bcm97425svmb.dts | 9 +++++++++ dts/src/mips/brcm/bcm97435svmb.dts | 9 +++++++++ 4 files changed, 78 insertions(+) (limited to 'dts/src/mips/brcm') diff --git a/dts/src/mips/brcm/bcm7425.dtsi b/dts/src/mips/brcm/bcm7425.dtsi index aa0b2d39c9..62588c53d3 100644 --- a/dts/src/mips/brcm/bcm7425.dtsi +++ b/dts/src/mips/brcm/bcm7425.dtsi @@ -584,4 +584,34 @@ }; }; }; + + pcie_0: pcie@8b20000 { + status = "disabled"; + compatible = "brcm,bcm7425-pcie"; + + ranges = <0x02000000 0x0 0xd0000000 0xd0000000 0x0 0x08000000 + 0x02000000 0x0 0xd8000000 0xd8000000 0x0 0x08000000 + 0x02000000 0x0 0xe0000000 0xe0000000 0x0 0x08000000 + 0x02000000 0x0 0xe8000000 0xe8000000 0x0 0x08000000>; + + reg = <0x10410000 0x19310>; + aspm-no-l0s; + device_type = "pci"; + msi-controller; + msi-parent = <&pcie_0>; + #address-cells = <0x3>; + #size-cells = <0x2>; + bus-range = <0x0 0xff>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + linux,pci-domain = <0x0>; + + interrupt-parent = <&periph_intc>; + interrupts = <37>, <37>; + interrupt-names = "pcie", "msi"; + #interrupt-cells = <0x1>; + interrupt-map = <0 0 0 1 &periph_intc 0x21 + 0 0 0 1 &periph_intc 0x22 + 0 0 0 1 &periph_intc 0x23 + 0 0 0 1 &periph_intc 0x24>; + }; }; diff --git a/dts/src/mips/brcm/bcm7435.dtsi b/dts/src/mips/brcm/bcm7435.dtsi index 8398b7f68b..8c001b944c 100644 --- a/dts/src/mips/brcm/bcm7435.dtsi +++ b/dts/src/mips/brcm/bcm7435.dtsi @@ -599,4 +599,34 @@ }; }; }; + + pcie_0: pcie@8b20000 { + status = "disabled"; + compatible = "brcm,bcm7435-pcie"; + + ranges = <0x02000000 0x0 0xd0000000 0xd0000000 0x0 0x08000000 + 0x02000000 0x0 0xd8000000 0xd8000000 0x0 0x08000000 + 0x02000000 0x0 0xe0000000 0xe0000000 0x0 0x08000000 + 0x02000000 0x0 0xe8000000 0xe8000000 0x0 0x08000000>; + + reg = <0x10410000 0x19310>; + aspm-no-l0s; + device_type = "pci"; + msi-controller; + msi-parent = <&pcie_0>; + #address-cells = <0x3>; + #size-cells = <0x2>; + bus-range = <0x0 0xff>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + linux,pci-domain = <0x0>; + + interrupt-parent = <&periph_intc>; + interrupts = <39>, <39>; + interrupt-names = "pcie", "msi"; + #interrupt-cells = <0x1>; + interrupt-map = <0 0 0 1 &periph_intc 0x23 + 0 0 0 1 &periph_intc 0x24 + 0 0 0 1 &periph_intc 0x25 + 0 0 0 1 &periph_intc 0x26>; + }; }; diff --git a/dts/src/mips/brcm/bcm97425svmb.dts b/dts/src/mips/brcm/bcm97425svmb.dts index 9efecfe1e0..f389349343 100644 --- a/dts/src/mips/brcm/bcm97425svmb.dts +++ b/dts/src/mips/brcm/bcm97425svmb.dts @@ -152,3 +152,12 @@ &waketimer { status = "okay"; }; + +&pcie_0 { + status = "okay"; + /* 1GB Memc0, 1GB Memc1 */ + brcm,scb-sizes = <0 0x40000000 0 0x40000000>; + dma-ranges = <0x43000000 0x00000000 0x00000000 0x00000000 0x0 0x10000000 + 0x43000000 0x00000000 0x10000000 0x20000000 0x0 0x30000000 + 0x43000000 0x00000000 0x40000000 0x90000000 0x0 0x40000000>; +}; diff --git a/dts/src/mips/brcm/bcm97435svmb.dts b/dts/src/mips/brcm/bcm97435svmb.dts index b653c6ff74..a0cf53e23c 100644 --- a/dts/src/mips/brcm/bcm97435svmb.dts +++ b/dts/src/mips/brcm/bcm97435svmb.dts @@ -128,3 +128,12 @@ &waketimer { status = "okay"; }; + +&pcie_0 { + status = "okay"; + /* 1GB Memc0, 1GB Memc1 */ + brcm,scb-sizes = <0 0x40000000 0 0x40000000>; + dma-ranges = <0x43000000 0x00000000 0x00000000 0x00000000 0x0 0x10000000 + 0x43000000 0x00000000 0x10000000 0x20000000 0x0 0x30000000 + 0x43000000 0x00000000 0x40000000 0x90000000 0x0 0x40000000>; +}; -- cgit v1.2.3