From 4eefe44b3dea5b8eb778938e8f75c339ac5119fc Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 12 Apr 2022 10:22:48 +0200 Subject: dts: update to v5.18-rc2 Signed-off-by: Sascha Hauer --- dts/Bindings/display/bridge/chipone,icn6211.yaml | 1 - dts/Bindings/display/bridge/toshiba,tc358762.yaml | 1 - dts/Bindings/display/panel/panel-mipi-dbi-spi.yaml | 2 ++ dts/Bindings/net/ethernet-controller.yaml | 6 ++++++ dts/Bindings/net/micrel.txt | 17 ----------------- dts/Bindings/net/xilinx_axienet.txt | 8 +++++++- 6 files changed, 15 insertions(+), 20 deletions(-) (limited to 'dts') diff --git a/dts/Bindings/display/bridge/chipone,icn6211.yaml b/dts/Bindings/display/bridge/chipone,icn6211.yaml index 62c3bd4cb2..7257fd0ae4 100644 --- a/dts/Bindings/display/bridge/chipone,icn6211.yaml +++ b/dts/Bindings/display/bridge/chipone,icn6211.yaml @@ -51,7 +51,6 @@ properties: Video port for MIPI DPI output (panel or connector). required: - - port@0 - port@1 required: diff --git a/dts/Bindings/display/bridge/toshiba,tc358762.yaml b/dts/Bindings/display/bridge/toshiba,tc358762.yaml index 5216c27fc0..a412a1da95 100644 --- a/dts/Bindings/display/bridge/toshiba,tc358762.yaml +++ b/dts/Bindings/display/bridge/toshiba,tc358762.yaml @@ -39,7 +39,6 @@ properties: Video port for MIPI DPI output (panel or connector). required: - - port@0 - port@1 required: diff --git a/dts/Bindings/display/panel/panel-mipi-dbi-spi.yaml b/dts/Bindings/display/panel/panel-mipi-dbi-spi.yaml index f29789994b..c2df8d28aa 100644 --- a/dts/Bindings/display/panel/panel-mipi-dbi-spi.yaml +++ b/dts/Bindings/display/panel/panel-mipi-dbi-spi.yaml @@ -83,6 +83,8 @@ properties: required: - compatible - reg + - width-mm + - height-mm - panel-timing unevaluatedProperties: false diff --git a/dts/Bindings/net/ethernet-controller.yaml b/dts/Bindings/net/ethernet-controller.yaml index 817794e562..4f15463611 100644 --- a/dts/Bindings/net/ethernet-controller.yaml +++ b/dts/Bindings/net/ethernet-controller.yaml @@ -106,6 +106,12 @@ properties: phy-mode: $ref: "#/properties/phy-connection-type" + pcs-handle: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Specifies a reference to a node representing a PCS PHY device on a MDIO + bus to link with an external PHY (phy-handle) if exists. + phy-handle: $ref: /schemas/types.yaml#/definitions/phandle description: diff --git a/dts/Bindings/net/micrel.txt b/dts/Bindings/net/micrel.txt index c5ab62c391..8d157f0295 100644 --- a/dts/Bindings/net/micrel.txt +++ b/dts/Bindings/net/micrel.txt @@ -45,20 +45,3 @@ Optional properties: In fiber mode, auto-negotiation is disabled and the PHY can only work in 100base-fx (full and half duplex) modes. - - - lan8814,ignore-ts: If present the PHY will not support timestamping. - - This option acts as check whether Timestamping is supported by - hardware or not. LAN8814 phy support hardware tmestamping. - - - lan8814,latency_rx_10: Configures Latency value of phy in ingress at 10 Mbps. - - - lan8814,latency_tx_10: Configures Latency value of phy in egress at 10 Mbps. - - - lan8814,latency_rx_100: Configures Latency value of phy in ingress at 100 Mbps. - - - lan8814,latency_tx_100: Configures Latency value of phy in egress at 100 Mbps. - - - lan8814,latency_rx_1000: Configures Latency value of phy in ingress at 1000 Mbps. - - - lan8814,latency_tx_1000: Configures Latency value of phy in egress at 1000 Mbps. diff --git a/dts/Bindings/net/xilinx_axienet.txt b/dts/Bindings/net/xilinx_axienet.txt index b8e4894bc6..1aa4c6006c 100644 --- a/dts/Bindings/net/xilinx_axienet.txt +++ b/dts/Bindings/net/xilinx_axienet.txt @@ -26,7 +26,8 @@ Required properties: specified, the TX/RX DMA interrupts should be on that node instead, and only the Ethernet core interrupt is optionally specified here. -- phy-handle : Should point to the external phy device. +- phy-handle : Should point to the external phy device if exists. Pointing + this to the PCS/PMA PHY is deprecated and should be avoided. See ethernet.txt file in the same directory. - xlnx,rxmem : Set to allocated memory buffer for Rx/Tx in the hardware @@ -68,6 +69,11 @@ Optional properties: required through the core's MDIO interface (i.e. always, unless the PHY is accessed through a different bus). + - pcs-handle: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X + modes, where "pcs-handle" should be used to point + to the PCS/PMA PHY, and "phy-handle" should point to an + external PHY if exists. + Example: axi_ethernet_eth: ethernet@40c00000 { compatible = "xlnx,axi-ethernet-1.00.a"; -- cgit v1.2.3