From beec04590b85af55e9a5cc36ef575eead818a75f Mon Sep 17 00:00:00 2001 From: Ahmad Fatoum Date: Mon, 9 Dec 2019 15:11:13 +0100 Subject: ARM: i.MX: introduce imx_image_rule variable for code deduplication The next patch will add the .imxcfg file as a rule prerequisite, so the target is rebuilt if it changes. Instead of duplicating it in all rules, factor out the common parts into a imx_image_rule variable. As the arguments are now going through an eval, any use of $ must be escaped with another $ to become $$. No functional change. Signed-off-by: Ahmad Fatoum Signed-off-by: Sascha Hauer --- images/Makefile.imx | 34 +++++++++++++--------------------- 1 file changed, 13 insertions(+), 21 deletions(-) (limited to 'images') diff --git a/images/Makefile.imx b/images/Makefile.imx index 53d4ac8202..2d00229f43 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -23,28 +23,20 @@ endef # %.imximg - convert into i.MX image # ---------------------------------------------------------------- -$(obj)/%.imximg: $(obj)/% FORCE - $(call if_changed,imx_image,$(CFG_$(@F)),) - -$(obj)/%.pimximg: $(obj)/% FORCE - $(call if_changed,imx_image,$(CFG_$(patsubst %.pimximg,%.imximg,$(@F))),\ - -p $($(patsubst $(obj)/%.pblb,PBL_MEMORY_SIZE_%,$<))) - -$(obj)/%.psimximg: $(obj)/% FORCE - $(call if_changed,imx_image,$(CFG_$(patsubst %.psimximg,%.imximg,$(@F))),\ - -p $($(patsubst $(obj)/%.pblb,PBL_MEMORY_SIZE_%,$<)) -s) - -$(obj)/%.simximg: $(obj)/% FORCE - $(call if_changed,imx_image,$(CFG_$(patsubst %.simximg,%.imximg,$(@F))),-s) - -$(obj)/%.usimximg: $(obj)/% FORCE - $(call if_changed,imx_image,$(CFG_$(patsubst %.usimximg,%.imximg,$(@F))),-u -s) - -$(obj)/%.esimximg: $(obj)/% FORCE - $(call if_changed,imx_image,$(CFG_$(patsubst %.esimximg,%.imximg,$(@F))),-e -s) +define imx_image_rule +$(eval +$$(obj)/%.$(strip $(1)): $$(obj)/% FORCE + $$(call if_changed,imx_image,$$(CFG_$$(patsubst %.$(strip $(1)),%.imximg,$$(@F))),$(strip $(2))) +) +endef -$(obj)/%.esimximg.dek: $(obj)/% FORCE - $(call if_changed,imx_image,$(CFG_$(patsubst %.esimximg,%.imximg,$(@F))),-e -s) +$(call imx_image_rule,imximg) +$(call imx_image_rule,pimximg, -p $$($$(patsubst $$(obj)/%.pblb,PBL_MEMORY_SIZE_%,$$<))) +$(call imx_image_rule,psimximg, -p $$($$(patsubst $$(obj)/%.pblb,PBL_MEMORY_SIZE_%,$$<)) -s) +$(call imx_image_rule,simximg, -s) +$(call imx_image_rule,usimximg, -u -s) +$(call imx_image_rule,esimximg, -e -s) +$(call imx_image_rule,esimximg.dek, -e -s) .SECONDEXPANSION: $(obj)/%.img.dek: $(obj)/$$(FILE_$$(@F)) -- cgit v1.2.3 From 09ac94a036e8caea648771798890c25f67d8df3c Mon Sep 17 00:00:00 2001 From: Ahmad Fatoum Date: Mon, 9 Dec 2019 15:11:14 +0100 Subject: ARM: i.MX: rebuild .imximg if DCD table in .imxcfg changes So far changing the DCD table didn't trigger a rerun of the i.MX image utility. To fix this, we need to have the DCD table as prerequisite to the .imximg rule. The file name is contained in $(CFG_$(@F)), but can't be used directly because $@ (and by extension @F) has no value when first expanded in the read-in phase. If we expand a second time during the target-update phase however, we would get the correct value. GNU make provides .SECONDEXPANSION to expand all following prerequisites a second time. Use it to have changes to the DCD table rebuild the image. Because we are now using imx_image_rule to generate the target, we must escape each $ one more time to arrive at $$$$(CFG_$$$$(@F)). In the final step, we replace $$$$(@F) with %.imximg, so we support the rules not ending in .imximg as well. Dependency file generation is still broken however and changed to headers included in DCD tables won't be caught, but this functionality can be fixed in a separate patch. Signed-off-by: Ahmad Fatoum Signed-off-by: Sascha Hauer --- images/Makefile.imx | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'images') diff --git a/images/Makefile.imx b/images/Makefile.imx index 2d00229f43..24d3536d36 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -23,9 +23,10 @@ endef # %.imximg - convert into i.MX image # ---------------------------------------------------------------- +.SECONDEXPANSION: define imx_image_rule $(eval -$$(obj)/%.$(strip $(1)): $$(obj)/% FORCE +$$(obj)/%.$(strip $(1)): $$(obj)/% $$$$(CFG_%.imximg) FORCE $$(call if_changed,imx_image,$$(CFG_$$(patsubst %.$(strip $(1)),%.imximg,$$(@F))),$(strip $(2))) ) endef @@ -38,7 +39,6 @@ $(call imx_image_rule,usimximg, -u -s) $(call imx_image_rule,esimximg, -e -s) $(call imx_image_rule,esimximg.dek, -e -s) -.SECONDEXPANSION: $(obj)/%.img.dek: $(obj)/$$(FILE_$$(@F)) $(Q)if [ -z $(FILE_$(@F)) ]; then echo "FILE_$(@F) empty!"; false; fi $(call if_changed,shipped) -- cgit v1.2.3 From 207e33d4e037c51dcdbf83a79565b96a3a1b4da0 Mon Sep 17 00:00:00 2001 From: Stefan Riedmueller Date: Wed, 11 Dec 2019 11:59:17 +0100 Subject: ARM: dts: imx6: pcaaxl3: Make use of the simpler name phycard Use the simpler name phycard instead of the article number pcaaxl3 for device tree file names and image names of the phyCARD-i.MX 6. Signed-off-by: Stefan Riedmueller Signed-off-by: Sascha Hauer --- arch/arm/boards/phytec-som-imx6/lowlevel.c | 6 +- arch/arm/dts/Makefile | 2 +- arch/arm/dts/imx6q-phytec-pbaa03.dts | 32 ----- arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi | 177 --------------------------- arch/arm/dts/imx6q-phytec-phycard.dts | 36 ++++++ arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi | 171 ++++++++++++++++++++++++++ images/Makefile.imx | 6 +- 7 files changed, 214 insertions(+), 216 deletions(-) delete mode 100644 arch/arm/dts/imx6q-phytec-pbaa03.dts delete mode 100644 arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi create mode 100644 arch/arm/dts/imx6q-phytec-phycard.dts create mode 100644 arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi (limited to 'images') diff --git a/arch/arm/boards/phytec-som-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c index 2de84169c6..900aa19c19 100644 --- a/arch/arm/boards/phytec-som-imx6/lowlevel.c +++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c @@ -90,9 +90,9 @@ static void __noreturn start_imx6_phytec_common(uint32_t size, __dtb_##fdt_name##_start); \ } -PHYTEC_ENTRY(start_phytec_pbaa03_1gib, imx6q_phytec_pbaa03, SZ_1G, true); -PHYTEC_ENTRY(start_phytec_pbaa03_1gib_1bank, imx6q_phytec_pbaa03, SZ_1G, true); -PHYTEC_ENTRY(start_phytec_pbaa03_2gib, imx6q_phytec_pbaa03, SZ_2G, true); +PHYTEC_ENTRY(start_phytec_phycard_imx6q_1gib, imx6q_phytec_phycard, SZ_1G, true); +PHYTEC_ENTRY(start_phytec_phycard_imx6q_1gib_1bank, imx6q_phytec_phycard, SZ_1G, true); +PHYTEC_ENTRY(start_phytec_phycard_imx6q_2gib, imx6q_phytec_phycard, SZ_2G, true); PHYTEC_ENTRY(start_phytec_pbab01_512mb_1bank, imx6q_phytec_pbab01, SZ_512M, true); PHYTEC_ENTRY(start_phytec_pbab01_1gib, imx6q_phytec_pbab01, SZ_1G, true); diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 5c9a311c5f..e8dca0b851 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -52,7 +52,7 @@ lwl-dtb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += am335x-phytec-phyflex-som.dtb.o am33 am335x-phytec-phycore-som-nand-no-eeprom.dtb.o am335x-phytec-phycore-som-nand-no-spi-no-eeprom.dtb.o \ am335x-phytec-phycore-som-emmc.dtb.o \ am335x-phytec-phycard-som.dtb.o am335x-phytec-phycard-som-mlo.dtb.o -lwl-dtb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-pbaa03.dtb.o \ +lwl-dtb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-phycard.dtb.o \ imx6s-phytec-pbab01.dtb.o \ imx6dl-phytec-pbab01.dtb.o \ imx6q-phytec-pbab01.dtb.o \ diff --git a/arch/arm/dts/imx6q-phytec-pbaa03.dts b/arch/arm/dts/imx6q-phytec-pbaa03.dts deleted file mode 100644 index 8034f90804..0000000000 --- a/arch/arm/dts/imx6q-phytec-pbaa03.dts +++ /dev/null @@ -1,32 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later) -/* - * Copyright (C) 2014 PHYTEC Messtechnik GmbH - * Author: Christian Hemp - */ - -/dts-v1/; -#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY -#include CONFIG_BOOTM_FITIMAGE_PUBKEY -#endif -#include "imx6q-phytec-pcaaxl3.dtsi" - -/ { - model = "PHYTEC phyCARD-i.MX6 Quad"; - compatible = "phytec,imx6q-pbaa03", "phytec,imx6q-pcaaxl3", "fsl,imx6q"; - - chosen { - stdout-path = &uart3; - }; -}; - -&fec { - status = "okay"; -}; - -&uart3 { - status = "okay"; -}; - -&usdhc3 { - status = "okay"; -}; diff --git a/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi b/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi deleted file mode 100644 index 0dbd5419ba..0000000000 --- a/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi +++ /dev/null @@ -1,177 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later) -/* - * Copyright (C) 2014 PHYTEC Messtechnik GmbH - * Author: Christian Hemp - */ - -#include -#include "imx6q.dtsi" - -/ { - model = "PHYTEC phyCARD-i.MX6 Quad"; - compatible = "phytec,imx6q-pcaaxl3", "fsl,imx6q"; - - chosen { - environment-nand { - compatible = "barebox,environment"; - device-path = &environment_nand; - status = "disabled"; - }; - - environment-sd3 { - compatible = "barebox,environment"; - device-path = &environment_usdhc3; - status = "disabled"; - }; - }; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet>; - phy-mode = "mii"; - status = "disabled"; -}; - -&gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand>; - nand-on-flash-bbt; - status = "okay"; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "barebox"; - reg = <0x0 0x400000>; - }; - - environment_nand: partition@400000 { - label = "barebox-environment"; - reg = <0x400000 0x20000>; - }; - - partition@420000 { - label = "root"; - reg = <0x420000 0x0>; - }; - }; -}; - -&i2c1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - - eeprom: m24c32@50 { - compatible = "st,24c32", "at24"; - reg = <0x50>; - }; -}; - -&iomuxc { - pinctrl-names = "default"; - - pinctrl_enet: enetgrp { - fsl,pins = < - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 - MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 - MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 - MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 - MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 - MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 - MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 - MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 - MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x1b0b0 - MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x1b0b0 - MX6QDL_PAD_KEY_ROW1__ENET_COL 0x1b0b0 - MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x1b0b0 - MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x1b0b0 - MX6QDL_PAD_KEY_COL3__ENET_CRS 0x1b0b0 - MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b0 - MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x1b0b0 - >; - }; - - pinctrl_gpmi_nand: gpmigrp { - fsl,pins = < - MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 - MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 - MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 - MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 - MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 - MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 - MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 - MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 - MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 - MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 - MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 - MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 - MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 - MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 - MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 - MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 - MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 - MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 - >; - }; - - pinctrl_uart3: uart3grp { - fsl,pins = < - MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 - >; - }; - - pinctrl_usdhc3: usdhc3grp { - fsl,pins = < - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 - MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x80000000 /* CD */ - >; - }; -}; - -&ocotp { - barebox,provide-mac-address = <&fec 0x620>; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - status = "disabled"; -}; - -&usdhc3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3>; - cd-gpios = <&gpio5 22 0>; - status = "disabled"; - - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "barebox"; - reg = <0x0 0xe0000>; - }; - environment_usdhc3: partition@e0000 { - label = "barebox-environment"; - reg = <0xe0000 0x20000>; - }; -}; diff --git a/arch/arm/dts/imx6q-phytec-phycard.dts b/arch/arm/dts/imx6q-phytec-phycard.dts new file mode 100644 index 0000000000..09106f7d4d --- /dev/null +++ b/arch/arm/dts/imx6q-phytec-phycard.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later) +/* + * Copyright (C) 2014 PHYTEC Messtechnik GmbH + * Author: Christian Hemp + */ + +/dts-v1/; + +#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY +#include CONFIG_BOOTM_FITIMAGE_PUBKEY +#endif + +#include +#include "imx6q.dtsi" +#include "imx6qdl-phytec-phycard-som.dtsi" + +/ { + model = "PHYTEC phyCARD-i.MX6 Quad"; + compatible = "phytec,imx6q-pbaa03", "phytec,imx6q-pcaaxl3", "fsl,imx6q"; + + chosen { + stdout-path = &uart3; + }; +}; + +&fec { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&usdhc3 { + status = "okay"; +}; diff --git a/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi new file mode 100644 index 0000000000..6d963f1910 --- /dev/null +++ b/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi @@ -0,0 +1,171 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later) +/* + * Copyright (C) 2014 PHYTEC Messtechnik GmbH + * Author: Christian Hemp + */ + +/ { + chosen { + environment-nand { + compatible = "barebox,environment"; + device-path = &environment_nand; + status = "disabled"; + }; + + environment-sd3 { + compatible = "barebox,environment"; + device-path = &environment_usdhc3; + status = "disabled"; + }; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "mii"; + status = "disabled"; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + nand-on-flash-bbt; + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x400000>; + }; + + environment_nand: partition@400000 { + label = "barebox-environment"; + reg = <0x400000 0x20000>; + }; + + partition@420000 { + label = "root"; + reg = <0x420000 0x0>; + }; + }; +}; + +&i2c1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + + eeprom: m24c32@50 { + compatible = "st,24c32", "at24"; + reg = <0x50>; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x1b0b0 + MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x1b0b0 + MX6QDL_PAD_KEY_ROW1__ENET_COL 0x1b0b0 + MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x1b0b0 + MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x1b0b0 + MX6QDL_PAD_KEY_COL3__ENET_CRS 0x1b0b0 + MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b0 + MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x1b0b0 + >; + }; + + pinctrl_gpmi_nand: gpmigrp { + fsl,pins = < + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 + MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x80000000 /* CD */ + >; + }; +}; + +&ocotp { + barebox,provide-mac-address = <&fec 0x620>; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "disabled"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + cd-gpios = <&gpio5 22 0>; + status = "disabled"; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0xe0000>; + }; + environment_usdhc3: partition@e0000 { + label = "barebox-environment"; + reg = <0xe0000 0x20000>; + }; +}; diff --git a/images/Makefile.imx b/images/Makefile.imx index 24d3536d36..71ff2962b5 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -273,11 +273,11 @@ $(call build_imx_habv4img, CONFIG_MACH_EMBEST_MARSBOARD, start_imx6q_marsboard, $(call build_imx_habv4img, CONFIG_MACH_EMBEST_RIOTBOARD, start_imx6s_riotboard, embest-riotboard/flash-header-embest-riotboard, embest-imx6s-riotboard) -$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_pbaa03_1gib, phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib, phytec-pbaa03-1gib) +$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycard_imx6q_1gib, phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib, phytec-phycard-imx6q-1gib) -$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_pbaa03_1gib_1bank, phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib-1bank, phytec-pbaa03-1gib-1bank) +$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycard_imx6q_1gib_1bank, phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib-1bank, phytec-phycard-imx6q-1gib-1bank) -$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_pbaa03_2gib, phytec-som-imx6/flash-header-phytec-pcaaxl3-2gib, phytec-pbaa03-2gib) +$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycard_imx6q_2gib, phytec-som-imx6/flash-header-phytec-pcaaxl3-2gib, phytec-phycard-imx6q-2gib) $(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6q_som_nand_1gib, phytec-som-imx6/flash-header-phytec-pcm058-1gib, phytec-phycore-imx6q-som-nand-1gib) -- cgit v1.2.3