/ {
	chosen {
		stdout-path = &uart0;

		environment-nand {
			compatible = "barebox,environment";
			device-path = &env_nand;
			status = "disabled";
		};
	};
};

&am33xx_pinmux {

	i2c0_pins: pinmux_i2c0_pins {
			pinctrl-single,pins = <
			0x188 PIN_INPUT_PULLUP MUX_MODE0    /* i2c0_sda.i2c0_sda */
			0x18c PIN_INPUT_PULLUP MUX_MODE0    /* i2c0_scl.i2c0_scl */
		>;
	};

	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			0x170 PIN_INPUT_PULLUP MUX_MODE0    /* uart0_rxd.uart0_rxd */
			0x174 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* uart0_txd.uart0_txd */
		>;
	};

	uart3_pins: pinmux_uart3 {
		pinctrl-single,pins = <
			0x134 PIN_INPUT_PULLUP MUX_MODE1    /* mii1_rxd3.uart3_rxd */
			0x138 PIN_OUTPUT_PULLDOWN MUX_MODE1 /* mii1_rxd2.uart3_txd */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			0xf0 (INPUT_EN | PULL_UP) MUX_MODE0	/* mmc0_dat3.mmc0_dat3 */
			0xf4 (INPUT_EN | PULL_UP) MUX_MODE0	/* mmc0_dat2.mmc0_dat2 */
			0xf8 (INPUT_EN | PULL_UP) MUX_MODE0	/* mmc0_dat1.mmc0_dat1 */
			0xfc (INPUT_EN | PULL_UP) MUX_MODE0	/* mmc0_dat0.mmc0_dat0 */
			0x100 (INPUT_EN | PULL_UP) MUX_MODE0	/* mmc0_clk.mmc0_clk */
			0x104 (INPUT_EN | PULL_UP) MUX_MODE0	/* mmc0_cmd.mmc0_cmd */
		>;
	};

	emac_rmii1_pins: pinmux_emac_rmii1_pins {
		pinctrl-single,pins = <
			0x10c PIN_INPUT_PULLDOWN MUX_MODE1	/* mii1_crs.rmii1_crs_dv */
			0x110 PIN_INPUT_PULLDOWN MUX_MODE1	/* mii1_rxerr.rmii1_rxerr */
			0x114 PIN_OUTPUT MUX_MODE1		/* mii1_txen.rmii1_txen */
			0x124 PIN_OUTPUT MUX_MODE1		/* mii1_txd1.rmii1_txd1 */
			0x128 PIN_OUTPUT MUX_MODE1		/* mii1_txd0.rmii1_txd0 */
			0x13c PIN_INPUT_PULLDOWN MUX_MODE1	/* mii1_rxd1.rmii1_rxd1 */
			0x140 PIN_INPUT_PULLDOWN MUX_MODE1	/* mii1_rxd0.rmii1_rxd0 */
			0x144 PIN_INPUT_PULLDOWN MUX_MODE0	/* rmii1_refclk.rmii1_refclk */
		>;
	};

	nandflash_pins_s0: nandflash_pins_s0 {
		pinctrl-single,pins = <
			0x0 PIN_INPUT_PULLUP MUX_MODE0	/* gpmc_ad0.gpmc_ad0 */
			0x4 PIN_INPUT_PULLUP MUX_MODE0	/* gpmc_ad1.gpmc_ad1 */
			0x8 PIN_INPUT_PULLUP MUX_MODE0	/* gpmc_ad2.gpmc_ad2 */
			0xc PIN_INPUT_PULLUP MUX_MODE0	/* gpmc_ad3.gpmc_ad3 */
			0x10 PIN_INPUT_PULLUP MUX_MODE0	/* gpmc_ad4.gpmc_ad4 */
			0x14 PIN_INPUT_PULLUP MUX_MODE0	/* gpmc_ad5.gpmc_ad5 */
			0x18 PIN_INPUT_PULLUP MUX_MODE0	/* gpmc_ad6.gpmc_ad6 */
			0x1c PIN_INPUT_PULLUP MUX_MODE0	/* gpmc_ad7.gpmc_ad7 */
			0x70 PIN_INPUT_PULLUP MUX_MODE0	/* gpmc_wait0.gpmc_wait0 */
			0x7c PIN_OUTPUT MUX_MODE0	/* gpmc_csn0.gpmc_csn0  */
			0x90 PIN_OUTPUT MUX_MODE0	/* gpmc_advn_ale.gpmc_advn_ale */
			0x94 PIN_OUTPUT MUX_MODE0	/* gpmc_oen_ren.gpmc_oen_ren */
			0x98 PIN_OUTPUT MUX_MODE0	/* gpmc_wen.gpmc_wen */
			0x9c PIN_OUTPUT MUX_MODE0	/* gpmc_be0n_cle.gpmc_be0n_cle */
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST) MUX_MODE0	/* mdio_data.mdio_data */
			0x14c PIN_OUTPUT_PULLUP MUX_MODE0			/* mdio_clk.mdio_clk */
		>;
	};
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

	eeprom: eeprom@54 {
		status = "disabled";
		compatible = "atmel,24c32";
		pagesize = <32>;
		reg = <0x54>;
	};
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	status = "okay";
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
	status = "okay";
};

&davinci_mdio {
	pinctrl-names = "default";
	pinctrl-0 = <&davinci_mdio_default>;
	status = "okay";

	phy0: ethernet-phy@0 {
		reg = <0>;
	};
};

&cpsw_emac0 {
	phy-handle = <&phy0>;
	phy-mode = "rmii";
	dual_emac_res_vlan = <1>;
};

&mac {
	pinctrl-names = "default";
	pinctrl-0 = <&emac_rmii1_pins>;
	slaves = <1>;
	status = "okay";
};

&gpmc {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&nandflash_pins_s0>;
	ranges = <0 0 0x08000000 0x1000000>;	/* CS0: 16MB for NAND */
	nand: nand@0,0 {
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		nand-bus-width = <8>;
		ti,nand-ecc-opt = "bch8";
		gpmc,device-nand = "true";
		gpmc,device-width = <1>;
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <30>;
		gpmc,cs-wr-off-ns = <30>;
		gpmc,adv-on-ns = <0>;
		gpmc,adv-rd-off-ns = <30>;
		gpmc,adv-wr-off-ns = <30>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <20>;
		gpmc,oe-on-ns = <10>;
		gpmc,oe-off-ns = <30>;
		gpmc,access-ns = <30>;
		gpmc,rd-cycle-ns = <30>;
		gpmc,wr-cycle-ns = <30>;
		gpmc,wait-pin = <1>;
		gpmc,wait-on-read = "true";
		gpmc,wait-on-write = "true";
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <50>;
		gpmc,cycle2cycle-diffcsen;
		gpmc,clk-activation-ns = <0>;
		gpmc,wait-monitoring-ns = <0>;
		gpmc,wr-access-ns = <0>;
		gpmc,wr-data-mux-bus-ns = <0>;

		#address-cells = <1>;
		#size-cells = <1>;
		elm_id = <&elm>;

		partition@0 {
			label = "xload";
			reg = <0x0 0x20000>;
		};

		partition@20000 {
			label = "xload_backup1";
			reg = <0x20000 0x20000>;
		};

		partition@40000 {
			label = "xload_backup2";
			reg = <0x40000 0x20000>;
		};

		partition@60000 {
			label = "xload_backup3";
			reg = <0x60000 0x20000>;
		};

		partition@80000 {
			label = "barebox";
			reg = <0x80000 0x80000>;
		};

		partition@100000 {
			label = "barebox_backup";
			reg = <0x100000 0x80000>;
		};

		env_nand: partition@180000 {
			label = "bareboxenv";
			reg = <0x180000 0x40000>;
		};

		partition@1C0000 {
			label = "root";
			/*
			 * Size 0x0 extends partition to
			 * end of nand flash.
			 */
			reg = <0x1C0000 0x0>;
		};
	};
};