/*
 * Copyright (C) 2014 Eric Bénard - Eukréa Electromatique
 *
 * The code contained herein is licensed under the GNU General Public
 * License version 2.
 */
/dts-v1/;

#include "imx6dl.dtsi"

/ {
	model = "RIoTboard Solo";
	compatible = "embest,riotboard", "fsl,imx6dl";

	chosen {
		linux,stdout-path = &uart2;

		environment@0 {
			compatible = "barebox,environment";
			device-path = &usdhc4, "partname:barebox-environment";
		};
	};

	memory {
		reg = <0x10000000 0x40000000>;
	};

	gpio-leds {
		compatible = "gpio-leds";

		d45 {
			label = "d45";
			gpios = <&gpio5 2 1>;
			linux,default-trigger = "heartbeat";
		};

		d46 {
			label = "d46";
			gpios = <&gpio3 28 1>;
			linux,default-trigger = "default-on";
		};
	};


	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_3p3v: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx6s-riotboard {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x80000000 /* LED D45 */
				MX6QDL_PAD_EIM_D28__GPIO3_IO28		0x80000000 /* LED D46 */
				MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16	0x80000000 /* PMIC_INT_B */
				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x030b0 /* CAM_MCLK + SGTL_MCLK */
			>;
		};
		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
			>;
		};
		pinctrl_rgmii_ar8035: rgmii_ar8035 {
			fsl,pins = <
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
				/* AR8035 reset */
				MX6QDL_PAD_EIM_D31__GPIO3_IO31		0x130b0
				/* AR8035 interrupt */
				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x80000000
				/* GPIO16 -> AR8035 25MHz */
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0xc0000000
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x80000000
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
				/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x0a0b1
				/* AR8035 pin strapping: IO voltage: pull up */
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
				/* AR8035 pin strapping: PHYADDR#0: pull down */
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x130b0
				/* AR8035 pin strapping: PHYADDR#1: pull down */
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x130b0
				/* AR8035 pin strapping: MODE#1: pull up */
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
				/* AR8035 pin strapping: MODE#3: pull up */
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
				/* AR8035 pin strapping: MODE#0: pull down */
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x130b0
			>;
		};
		pinctrl_usdhc4: usdhc4grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_CLK__SD4_CLK			0x80000000
				MX6QDL_PAD_SD4_CMD__SD4_CMD			0x80000000
				MX6QDL_PAD_SD4_DAT0__SD4_DATA0			0x80000000
				MX6QDL_PAD_SD4_DAT1__SD4_DATA1			0x80000000
				MX6QDL_PAD_SD4_DAT2__SD4_DATA2			0x80000000
				MX6QDL_PAD_SD4_DAT3__SD4_DATA3			0x80000000
			>;
		};
		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_CLK__SD2_CLK			0x80000000
				MX6QDL_PAD_SD2_CMD__SD2_CMD			0x80000000
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0			0x80000000
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1			0x80000000
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2			0x80000000
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3			0x80000000
				MX6QDL_PAD_GPIO_2__GPIO1_IO02			0x80000000
				MX6QDL_PAD_GPIO_4__GPIO1_IO04			0x80000000
			>;
		};
		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD			0x80000000
				MX6QDL_PAD_SD3_CLK__SD3_CLK			0x80000000
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0			0x80000000
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1			0x80000000
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2			0x80000000
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3			0x80000000
				MX6QDL_PAD_SD3_DAT4__GPIO7_IO01			0x80000000
				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00			0x80000000
			>;
		};
		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID		0x80000000
				MX6QDL_PAD_EIM_D22__USB_OTG_PWR			0x80000000
				MX6QDL_PAD_EIM_D21__USB_OTG_OC			0x80000000
			>;
		};
		pinctrl_i2c1_2: i2c1grp-2 {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
				MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
			>;
		};
		pinctrl_i2c2_2: i2c2grp-2 {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
			>;
		};
		pinctrl_i2c3_2: i2c3grp-2 {
			fsl,pins = <
				MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
				MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
			>;
		};
		pinctrl_i2c4_2: i2c4grp-2 {
			fsl,pins = <
				MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1
				MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1
			>;
		};
	};
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii_ar8035>;
	phy-mode = "rgmii";
	phy-reset-duration = <2>;
	phy-reset-gpios = <&gpio3 31 0>;
	status = "okay";
};

&usdhc2 {
	/* SD card socket - bottom */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	bus-width = <4>;
	cd-gpios = <&gpio1 4 0>;
	wp-gpios = <&gpio1 2 0>;
	status = "okay";
	#address-cells = <1>;
	#size-cells = <1>;
};

&usdhc3 {
	/* uSD card socket - top */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <4>;
	cd-gpios = <&gpio7 0 0>;
	wp-gpios = <&gpio7 1 0>;
	status = "okay";
	#address-cells = <1>;
	#size-cells = <1>;
};

&usdhc4 {
	/* eMMC */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	bus-width = <4>;
	non-removable;
	status = "okay";

	#address-cells = <1>;
	#size-cells = <1>;

	partition@0 {
		label = "barebox";
		reg = <0x0 0x80000>;
	};

	partition@1 {
		label = "barebox-environment";
		reg = <0x80000 0x80000>;
	};
};

&usbh1 {
	status = "okay";
	phy_type = "utmi";
	disable-over-current;
};

&usbotg {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	phy_type = "utmi";
	dr_mode = "peripheral";
	otg_id_pin_select_change;
	status = "okay";
};

&i2c1 {
	status = "okay";
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1_2>;

	pmic: pf0100@08 {
		compatible = "pf0100-regulator";
		reg = <0x08>;
		interrupt-parent = <&gpio5>;
		interrupts = <16 8>;

		regulators {
			reg_vddcore: sw1ab {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-always-on;
			};

			reg_vddsoc: sw1c {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-always-on;
			};

			reg_gen_3v3: sw2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			reg_ddr_1v5a: sw3a {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-always-on;
			};

			reg_ddr_1v5b: sw3b {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-always-on;
			};

			reg_ddr_vtt: sw4 {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-always-on;
			};

			reg_5v_600mA: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
				regulator-always-on;
			};

			reg_snvs_3v: vsnvs {
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <3000000>;
				regulator-always-on;
			};

			reg_vrefddr: vrefddr {
				regulator-min-microvolt = <750000>;
				regulator-max-microvolt = <750000>;
				regulator-always-on;
			};

			reg_vgen1_1v5: vgen1 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
				/* not used */
			};

			reg_vgen2_1v2_eth: vgen2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
				regulator-always-on;
			};

			reg_vgen3_2v8: vgen3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			reg_vgen4_1v8: vgen4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			reg_vgen5_2v5_sgtl: vgen5 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			reg_vgen6_3v3: vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};

	codec: sgtl5000@0a {
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		clocks = <&clks 201>;
		VDDA-supply = <&reg_vgen5_2v5_sgtl>;
		VDDIO-supply = <&reg_3p3v>;
	};
};

&i2c2 {
	status = "okay";
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2_2>;
};

&i2c3 {
	status = "okay";
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3_2>;
};

&i2c4 {
	status = "okay";
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c4_2>;
};

&ocotp {
	barebox,provide-mac-address = <&fec 0x620>;
};