// SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2017 Atlas Copco Industrial Technique */ /dts-v1/; #include / { model = "Atlas Copco SXB Board"; compatible = "ac,imx7d-sxb", "fsl,imx7d"; reg_sd1_vmmc: regulator-reg-sd1-vmmc { compatible = "regulator-fixed"; regulator-name = "VDD_SD1"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>; assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; status = "okay"; }; &usdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; tuning-step = <2>; vmmc-supply = <®_sd1_vmmc>; enable-sdio-wakeup; no-1-8-v; keep-power-in-suspend; status = "okay"; partitions { compatible = "fixed-partitions"; #address-cells = <2>; #size-cells = <2>; usdhc1_sdcard: state@4100000 { reg = <0x0 0x4100000 0x0 0xffffff>; label = "state-sdcard"; }; }; }; &usdhc3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3>; assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; assigned-clock-rates = <400000000>; bus-width = <8>; non-removable; status = "okay"; partitions { compatible = "fixed-partitions"; #address-cells = <2>; #size-cells = <2>; usdhc3_emmc: usdhc3_emmc@1e800000 { reg = <0x0 0x1e800000 0x0 0xffffff>; label = "state-emmc"; }; }; }; &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog1>; fsl,ext-reset-output; status = "okay"; }; &iomuxc { pinctrl-names = "default"; imx7d-sxb { pinctrl_uart1: uart1grp { fsl,pins = < MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79 >; }; pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX7D_PAD_SD1_CMD__SD1_CMD 0x59 MX7D_PAD_SD1_CLK__SD1_CLK 0x19 MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 >; }; pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX7D_PAD_SD3_CMD__SD3_CMD 0x59 MX7D_PAD_SD3_CLK__SD3_CLK 0x19 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x19 >; }; }; }; &iomuxc_lpsr { pinctrl_wdog1: wdog1grp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x75 >; }; };