// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright 2017 NXP
 * Copyright (C) 2017 Pengutronix, Lucas Stach <kernel@pengutronix.de>
 */

#include <dt-bindings/reset/imx8mq-reset.h>
#include <dt-bindings/thermal/thermal.h>

/ {
	aliases {
		gpio0 = &gpio1;
		gpio1 = &gpio2;
		gpio2 = &gpio3;
		gpio3 = &gpio4;
		gpio4 = &gpio5;
		mmc0 = &usdhc1;
		mmc1 = &usdhc2;
	};

	thermal-zones {
		cpu-thermal {
			polling-delay-passive = <250>;
			polling-delay = <2000>;
			thermal-sensors = <&tmu>;

			trips {
				cpu_alert0: trip0 {
					temperature = <85000>;
					hysteresis = <2000>;
					type = "passive";
				};

				cpu_crit0: trip1 {
					temperature = <95000>;
					hysteresis = <2000>;
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu_alert0>;
					cooling-device = <&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};
	};

	soc@0 {
		bus@30000000 {
			tmu: tmu@30260000 {
				compatible = "fsl,imx8mq-tmu";
				reg = <0x30260000 0x10000>;
				interrupt = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
				little-endian;
				fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
				fsl,tmu-calibration = <0x00000000 0x00000023
				                       0x00000001 0x00000029
				                       0x00000002 0x0000002f
				                       0x00000003 0x00000035
				                       0x00000004 0x0000003d
				                       0x00000005 0x00000043
				                       0x00000006 0x0000004b
				                       0x00000007 0x00000051
				                       0x00000008 0x00000057
				                       0x00000009 0x0000005f
				                       0x0000000a 0x00000067
				                       0x0000000b 0x0000006f

				                       0x00010000 0x0000001b
				                       0x00010001 0x00000023
				                       0x00010002 0x0000002b
				                       0x00010003 0x00000033
				                       0x00010004 0x0000003b
				                       0x00010005 0x00000043
				                       0x00010006 0x0000004b
				                       0x00010007 0x00000055
				                       0x00010008 0x0000005d
				                       0x00010009 0x00000067
				                       0x0001000a 0x00000070

				                       0x00020000 0x00000017
				                       0x00020001 0x00000023
				                       0x00020002 0x0000002d
				                       0x00020003 0x00000037
				                       0x00020004 0x00000041
				                       0x00020005 0x0000004b
				                       0x00020006 0x00000057
				                       0x00020007 0x00000063
				                       0x00020008 0x0000006f

				                       0x00030000 0x00000015
				                       0x00030001 0x00000021
				                       0x00030002 0x0000002d
				                       0x00030003 0x00000039
				                       0x00030004 0x00000045
				                       0x00030005 0x00000053
				                       0x00030006 0x0000005f
				                       0x00030007 0x00000071>;
				#thermal-sensor-cells =  <0>;
			};

			ocotp: ocotp@30350000 {
				compatible = "fsl,imx8mq-ocotp";
				reg = <0x30350000 0x10000>;
				clocks = <&clk IMX8MQ_CLK_OCOTP_ROOT>;
			};

			src: src@30390000 {
				compatible = "fsl,imx8mq-src", "syscon";
				reg = <0x30390000 0x10000>;
				#reset-cells = <1>;
			};
		};

		pcie0: pcie@33800000 {
			compatible = "fsl,imx8mq-pcie";
			reg = <0x33800000 0x400000>,
			      <0x1ff00000 0x80000>;
			reg-names = "dbi", "config";
			#address-cells = <3>;
			#size-cells = <2>;
			device_type = "pci";
			bus-range = <0x00 0xff>;
			ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */
				  0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
			num-lanes = <1>;
			interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "msi";
			#interrupt-cells = <1>;
			interrupt-map-mask = <0 0 0 0x7>;
			interrupt-map = <0 0 0 1 &gic GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
					<0 0 0 2 &gic GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
					<0 0 0 3 &gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
					<0 0 0 4 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
			fsl,max-link-speed = <2>;
			power-domains = <&pgc_pcie1>;
			resets = <&src IMX8MQ_RESET_PCIEPHY>,
				 <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>,
				 <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>;
			reset-names = "pciephy", "apps", "turnoff";
			fsl,controller-id = <0>;
			status = "disabled";
		};

		pcie1: pcie@33c00000 {
			compatible = "fsl,imx8mq-pcie";
			reg = <0x33c00000 0x400000>,
			      <0x27f00000 0x80000>;
			reg-names = "dbi", "config";
			#address-cells = <3>;
			#size-cells = <2>;
			device_type = "pci";
			ranges =  <0x81000000 0 0x00000000 0x27f80000 0 0x00010000 /* downstream I/O 64KB */
				  0x82000000 0 0x20000000 0x20000000 0 0x07f00000>; /* non-prefetchable memory */
			num-lanes = <1>;
			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "msi";
			#interrupt-cells = <1>;
			interrupt-map-mask = <0 0 0 0x7>;
			interrupt-map = <0 0 0 1 &gic GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
					<0 0 0 2 &gic GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
					<0 0 0 3 &gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
					<0 0 0 4 &gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
			fsl,max-link-speed = <2>;
			power-domains = <&pgc_pcie1>;
			resets = <&src IMX8MQ_RESET_PCIEPHY2>,
				 <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_EN>,
				 <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF>;
			reset-names = "pciephy", "apps", "turnoff";
			fsl,controller-id = <1>;
			status = "disabled";
		};
	};
};

&A53_0 {
	#cooling-cells = <2>;
};

&clk {
	assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>,
			  <&clk IMX8MQ_CLK_USDHC2>,
			  <&clk IMX8MQ_CLK_ENET_AXI>,
			  <&clk IMX8MQ_CLK_ENET_TIMER>,
			  <&clk IMX8MQ_CLK_ENET_REF>;
			  
	assigned-clock-parents =  <&clk IMX8MQ_SYS1_PLL_400M>,
				  <&clk IMX8MQ_SYS1_PLL_400M>,
				  <&clk IMX8MQ_SYS1_PLL_266M>,
				  <&clk IMX8MQ_SYS2_PLL_100M>,
				  <&clk IMX8MQ_SYS2_PLL_125M>;

	assigned-clock-rates = <200000000>,
			       <200000000>,
			       <266000000>,
			       <25000000>,
			       <125000000>;
};