// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
/*
 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
 * Author: Dom VOVARD <dom.vovard@linrt.com>.
 */
#include <arm/stm32mp15-pinctrl.dtsi>

&ethernet0_rgmii_pins_a {
	pins1 {
		pinmux = <STM32_PINMUX('G', 4, AF11)>,	/* ETH_RGMII_GTX_CLK */
			 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
			 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
			 <STM32_PINMUX('C', 2, AF11)>,	/* ETH_RGMII_TXD2 */
			 <STM32_PINMUX('E', 2, AF11)>,	/* ETH_RGMII_TXD3 */
			 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
			 <STM32_PINMUX('A', 2, AF11)>,	/* ETH_MDIO */
			 <STM32_PINMUX('C', 1, AF11)>;	/* ETH_MDC */
		bias-disable;
		drive-push-pull;
		slew-rate = <2>;
	};
	pins2 {
		pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
			 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
			 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
			 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
			 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
			 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
		bias-disable;
	};
};

&pinctrl {
	sdmmc1_dir_pins_b: sdmmc1-dir-1 {
		pins1 {
			pinmux = <STM32_PINMUX('E', 12, AF8)>, /* SDMMC1_D0DIR */
				 <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
				 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
			slew-rate = <3>;
			drive-push-pull;
			bias-pull-up;
		};
		pins2 {
			pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
			bias-pull-up;
		};
	};
};

&sdmmc1_b4_pins_a {
	pins1 {
		pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
			 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
			 <STM32_PINMUX('E', 6, AF8)>, /* SDMMC1_D2 */
			 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
			 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
		slew-rate = <1>;
		drive-push-pull;
		bias-disable;
	};
	pins2 {
		pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
		slew-rate = <2>;
		drive-push-pull;
		bias-disable;
	};
};

&sdmmc2_d47_pins_a {
	pins {
		pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
			 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
			 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
			 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
		slew-rate = <1>;
		drive-push-pull;
		bias-pull-up;
	};
};

&uart4_pins_a {
	pins1 {
		pinmux = <STM32_PINMUX('B', 9, AF8)>; /* UART4_TX */
		bias-disable;
		drive-push-pull;
		slew-rate = <0>;
	};
	pins2 {
		pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
		bias-disable;
	};
};