if ARCH_SOCFPGA

config ARCH_TEXT_BASE
	hex
	default 0x0

config ARCH_SOCFPGA_XLOAD
	bool
	prompt "Build preloader image"

config ARCH_TEXT_BASE
	hex
	default 0x00100000 if MACH_SOCFPGA_CYCLONE5

comment "Altera SoCFPGA System-on-Chip"

config ARCH_SOCFPGA_CYCLONE5
	bool
	select CPU_V7

config ARCH_SOCFPGA_ARRIA10
	bool
	select CPU_V7
	select HAVE_MACH_ARM_HEAD

config MACH_SOCFPGA_ALTERA_SOCDK
	select HAVE_DEFAULT_ENVIRONMENT_NEW
	select ARCH_SOCFPGA_CYCLONE5
	bool "Altera SoCFPGA Development Kit"

config MACH_SOCFPGA_EBV_SOCRATES
	select HAVE_DEFAULT_ENVIRONMENT_NEW
	select ARCH_SOCFPGA_CYCLONE5
	bool "EBV Socrates"

config MACH_SOCFPGA_REFLEX_ACHILLES
	select HAVE_DEFAULT_ENVIRONMENT_NEW
	select ARCH_SOCFPGA_ARRIA10
	bool "Reflex Achilles"

config MACH_SOCFPGA_TERASIC_DE0_NANO_SOC
	select HAVE_DEFAULT_ENVIRONMENT_NEW
	select ARCH_SOCFPGA_CYCLONE5
	bool "Terasic DE0-NANO-SoC aka Atlas"

config MACH_SOCFPGA_TERASIC_SOCKIT
	select HAVE_DEFAULT_ENVIRONMENT_NEW
	select ARCH_SOCFPGA_CYCLONE5
	bool "Terasic SoCKit"

endif