# SPDX-License-Identifier: GPL-2.0-only
menuconfig NVMEM
	bool "NVMEM Support"
	help
	  Support for NVMEM(Non Volatile Memory) devices like EEPROM, EFUSES...

	  This framework is designed to provide a generic interface to NVMEM

	  If unsure, say no.

if NVMEM

config NVMEM_RMEM
	bool "Reserved Memory Based Driver Support"
	help
	  This driver maps reserved memory into an nvmem device. It might be
	  useful to expose information left by firmware in memory.

config NVMEM_SNVS_LPGPR
	tristate "Freescale SNVS LPGPR support"
	select MFD_SYSCON
	help
	  If you say yes here you get NVMEM support for the Freescale SNVS
	  Low Power Generic Purpose Register (LPGPR).

config IMX_OCOTP
	tristate "i.MX6 On Chip OTP controller"
	depends on ARCH_IMX6 || ARCH_VF610 || ARCH_IMX8M || ARCH_IMX7
	depends on OFDEVICE
	help
	  This adds support for the i.MX6 On-Chip OTP controller. Currently the
	  only supported functionality is reading the MAC address and assigning
	  it to an ethernet device.

config IMX_OCOTP_WRITE
	bool
	prompt "Enable write support of i.MX6 CPUs OTP fuses"
	depends on IMX_OCOTP
	help
	  This adds write support to IMX6 On-Chip OTP registers. Example of set
	  MAC to 12:34:56:78:9A:BC (2 words with address 0x22 (OCOTP_MAC0) and
	  address 0x23 (OCOTP_MAC1)). To calculate the file offset multiply
	  the value of the address by 4.
	    mw -l -d /dev/imx-ocotp 0x8C 0x00001234
	    mw -l -d /dev/imx-ocotp 0x88 0x56789ABC

config IMX_OCOTP_ELE
	tristate "i.MX9 On Chip OTP controller"
	depends on ARCH_IMX93
	depends on OFDEVICE
	help
	  This adds support for the i.MX9 On-Chip OTP controller.

config RAVE_SP_EEPROM
	tristate "Rave SP EEPROM Support"
	depends on RAVE_SP_CORE
	help
	  Say y here to enable Rave SP EEPROM support.

config EEPROM_93XX46
	bool "Microwire EEPROM 93XX46 support"
	depends on SPI
	help
	  Driver for the microwire EEPROM chipsets 93xx46x. The driver
	  supports both read and write commands and also the command to
	  erase the whole EEPROM.

config NVMEM_ROCKCHIP_OTP
	tristate "Rockchip OTP controller support"
	depends on ARCH_ROCKCHIP || COMPILE_TEST
	help
	  This is a simple driver to dump specified values of Rockchip SoC
	  from otp, such as cpu-leakage, id etc.

config STM32_BSEC
	tristate "STM32 Boot and security and OTP control"
	depends on ARCH_STM32MP
	depends on OFDEVICE
	help
	  This adds support for the STM32 OTP controller.

config STM32_BSEC_WRITE
	bool
	prompt "Enable write support of STM32 CPUs OTP fuses"
	depends on STM32_BSEC
	help
	  This adds write support to STM32 On-Chip OTP registers. Example of set
	  MAC to 12:34:56:78:9A:BC:
	    bsec0.permanent_write_enable=1
	    mw -l -d /dev/stm32-bsec 0x000000e4+4 0x78563412
	    mw -l -d /dev/stm32-bsec 0x000000e8+4 0x0000bc9a

config STM32_BSEC_OPTEE_TA
	def_bool STM32_BSEC && OPTEE
	help
	  Say y here to enable the accesses to STM32MP SoC OTPs by the OP-TEE
	  trusted application STM32MP BSEC.

config KVX_OTP_NV
	tristate "kalray KVX OTP Non volatile regs Support"
	depends on KVX
	help
	  This is a simple driver to dump specified values of KVX OTP non
	  volatile regs.

config STARFIVE_OTP
	tristate "Starfive OTP Supprot"
	depends on SOC_STARFIVE
	depends on OFDEVICE
	help
	  This adds support for the StarFive OTP controller. Only reading
	  is currently supported.

endif