# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/bus/ti-sysc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Texas Instruments interconnect target module maintainers: - Tony Lindgren description: Texas Instruments SoCs can have a generic interconnect target module for devices connected to various interconnects such as L3 interconnect using Arteris NoC, and L4 interconnect using Sonics s3220. This module is mostly used for interaction between module and Power, Reset and Clock Manager PRCM. It participates in the OCP Disconnect Protocol, but other than that it is mostly independent of the interconnect. Each interconnect target module can have one or more devices connected to it. There is a set of control registers for managing the interconnect target module clocks, idle modes and interconnect level resets. The interconnect target module control registers are sprinkled into the unused register address space of the first child device IP block managed by the interconnect target module. Typically the register names are REVISION, SYSCONFIG and SYSSTATUS. properties: $nodename: pattern: "^target-module(@[0-9a-f]+)?$" compatible: oneOf: - items: - enum: - ti,sysc-omap2 - ti,sysc-omap4 - ti,sysc-omap4-simple - ti,sysc-omap2-timer - ti,sysc-omap4-timer - ti,sysc-omap3430-sr - ti,sysc-omap3630-sr - ti,sysc-omap4-sr - ti,sysc-omap3-sham - ti,sysc-omap-aes - ti,sysc-mcasp - ti,sysc-dra7-mcasp - ti,sysc-usb-host-fs - ti,sysc-dra7-mcan - ti,sysc-pruss - const: ti,sysc - items: - const: ti,sysc reg: description: Interconnect target module control registers consisting of REVISION, SYSCONFIG and SYSSTATUS registers as defined in the Technical Reference Manual for the SoC. minItems: 1 maxItems: 3 reg-names: description: Interconnect target module control register names consisting of "rev", "sysc" and "syss". oneOf: - minItems: 1 items: - const: rev - const: sysc - const: syss - items: - const: rev - const: syss - enum: [ sysc, syss ] power-domains: description: Target module power domain if available. maxItems: 1 clocks: description: Target module clocks consisting of one functional clock, one interface clock, and up to 8 module specific optional clocks. Some modules may have only the functional clock, and some have no configurable clocks. minItems: 1 maxItems: 4 clock-names: description: Target module clock names like "fck", "ick", "optck1", "optck2" if the clocks are configurable. oneOf: - enum: [ ick, fck, sys_clk ] - items: - const: fck - enum: [ ick, dbclk, osc, sys_clk, dss_clk, ahclkx ] - items: - const: fck - const: phy-clk - const: phy-clk-div - items: - const: fck - const: hdmi_clk - const: sys_clk - const: tv_clk - items: - const: fck - const: ahclkx - const: ahclkr resets: description: Target module reset bit in the RSTCTRL register if wired for the module. Note that the other reset bits should be mapped for the child device driver to use. maxItems: 1 reset-names: description: Target module reset names in the RSTCTRL register, typically named "rstctrl" if only one reset bit is wired for the module. items: - const: rstctrl '#address-cells': enum: [ 1, 2 ] '#size-cells': enum: [ 1, 2 ] ranges: true dma-ranges: true ti,sysc-mask: description: Mask of supported register bits for the SYSCONFIG register $ref: /schemas/types.yaml#/definitions/uint32 ti,sysc-midle: description: List of hardware supported idle modes $ref: /schemas/types.yaml#/definitions/uint32-array ti,sysc-sidle: description: List of hardware supported idle modes $ref: /schemas/types.yaml#/definitions/uint32-array ti,syss-mask: description: Mask of supported register bits for the SYSSTATUS register $ref: /schemas/types.yaml#/definitions/uint32 ti,sysc-delay-us: description: Delay needed after OCP softreset before accessing SYCONFIG default: 0 minimum: 0 maximum: 2 ti,no-reset-on-init: description: Interconnect target module shall not be reset at init type: boolean ti,no-idle-on-init: description: Interconnect target module shall not be idled at init type: boolean ti,no-idle: description: Interconnect target module shall not be idled type: boolean ti,hwmods: description: Interconnect module name to use with legacy hwmod data $ref: /schemas/types.yaml#/definitions/string deprecated: true required: - compatible - '#address-cells' - '#size-cells' - ranges additionalProperties: type: object examples: - | #include #include target-module@2b000 { compatible = "ti,sysc-omap2", "ti,sysc"; ti,hwmods = "usb_otg_hs"; reg = <0x2b400 0x4>, <0x2b404 0x4>, <0x2b408 0x4>; reg-names = "rev", "sysc", "syss"; clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>; clock-names = "fck"; ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>; ti,sysc-midle = , , ; ti,sysc-sidle = , , , ; ti,syss-mask = <1>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x2b000 0x1000>; };