NVIDIA Tegra124 and Tegra132 Clock And Reset Controller This binding uses the common clock binding: Documentation/devicetree/bindings/clock/clock-bindings.txt The CAR (Clock And Reset) Controller on Tegra is the HW module responsible for muxing and gating Tegra's clocks, and setting their rates. Required properties : - compatible : Should be "nvidia,tegra124-car" or "nvidia,tegra132-car" - reg : Should contain CAR registers location and length - clocks : Should contain phandle and clock specifiers for two clocks: the 32 KHz "32k_in", and the board-specific oscillator "osc". - #clock-cells : Should be 1. In clock consumers, this cell represents the clock ID exposed by the CAR. The assignments may be found in the header files (which covers IDs common to Tegra124 and Tegra132) and (for Tegra124-specific clocks). - #reset-cells : Should be 1. In clock consumers, this cell represents the bit number in the CAR's array of CLK_RST_CONTROLLER_RST_DEVICES_* registers. - nvidia,external-memory-controller : phandle of the EMC driver. The node should contain a "emc-timings" subnode for each supported RAM type (see field RAM_CODE in register PMC_STRAPPING_OPT_A). Required properties for "emc-timings" nodes : - nvidia,ram-code : Should contain the value of RAM_CODE this timing set is used for. Each "emc-timings" node should contain a "timing" subnode for every supported EMC clock rate. Required properties for "timing" nodes : - clock-frequency : Should contain the memory clock rate to which this timing relates. - nvidia,parent-clock-frequency : Should contain the rate at which the current parent of the EMC clock should be running at this timing. - clocks : Must contain an entry for each entry in clock-names. See ../clocks/clock-bindings.txt for details. - clock-names : Must include the following entries: - emc-parent : the clock that should be the parent of the EMC clock at this timing. Example SoC include file: / { tegra_car: clock@60006000 { compatible = "nvidia,tegra124-car"; reg = <0x60006000 0x1000>; #clock-cells = <1>; #reset-cells = <1>; nvidia,external-memory-controller = <&emc>; }; usb@c5004000 { clocks = <&tegra_car TEGRA124_CLK_USB2>; }; }; Example board file: / { clocks { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <0>; osc: clock@0 { compatible = "fixed-clock"; reg = <0>; #clock-cells = <0>; clock-frequency = <112400000>; }; clk_32k: clock@1 { compatible = "fixed-clock"; reg = <1>; #clock-cells = <0>; clock-frequency = <32768>; }; }; &tegra_car { clocks = <&clk_32k> <&osc>; }; clock@60006000 { emc-timings-3 { nvidia,ram-code = <3>; timing-12750000 { clock-frequency = <12750000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-20400000 { clock-frequency = <20400000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; }; }; };