* Clock bindings for Freescale Vybrid VF610 SOC Required properties: - compatible: Should be "fsl,vf610-ccm" - reg: Address and length of the register set - #clock-cells: Should be <1> Optional properties: - clocks: list of clock identifiers which are external input clocks to the given clock controller. Please refer the next section to find the input clocks for a given controller. - clock-names: list of names of clocks which are exteral input clocks to the given clock controller. Input clocks for top clock controller: - sxosc (external crystal oscillator 32KHz, recommended) - fxosc (external crystal oscillator 24MHz, recommended) - audio_ext - enet_ext The clock consumer should specify the desired clock by having the clock ID in its "clocks" phandle cell. See include/dt-bindings/clock/vf610-clock.h for the full list of VF610 clock IDs. Examples: clks: ccm@4006b000 { compatible = "fsl,vf610-ccm"; reg = <0x4006b000 0x1000>; #clock-cells = <1>; clocks = <&sxosc>, <&fxosc>; clock-names = "sxosc", "fxosc"; }; uart1: serial@40028000 { compatible = "fsl,vf610-uart"; reg = <0x40028000 0x1000>; interrupts = <0 62 0x04>; clocks = <&clks VF610_CLK_UART1>; clock-names = "ipg"; };