Device-Tree bindings for Samsung Exynos SoC display controller (DECON) DECON (Display and Enhancement Controller) is the Display Controller for the Exynos series of SoCs which transfers the image data from a video memory buffer to an external LCD interface. Required properties: - compatible: value should be one of: "samsung,exynos5433-decon", "samsung,exynos5433-decon-tv"; - reg: physical base address and length of the DECON registers set. - interrupt-names: should contain the interrupt names depending on mode of work: video mode: "vsync", command mode: "lcd_sys", command mode with software trigger: "lcd_sys", "te". - interrupts or interrupts-extended: list of interrupt specifiers corresponding to names privided in interrupt-names, as described in interrupt-controller/interrupts.txt - clocks: must include clock specifiers corresponding to entries in the clock-names property. - clock-names: list of clock names sorted in the same order as the clocks property. Must contain "pclk", "aclk_decon", "aclk_smmu_decon0x", "aclk_xiu_decon0x", "pclk_smmu_decon0x", clk_decon_vclk", "sclk_decon_eclk" - ports: contains a port which is connected to mic node. address-cells and size-cells must 1 and 0, respectively. - port: contains an endpoint node which is connected to the endpoint in the mic node. The reg value muset be 0. Example: SoC specific DT entry: decon: decon@13800000 { compatible = "samsung,exynos5433-decon"; reg = <0x13800000 0x2104>; clocks = <&cmu_disp CLK_ACLK_DECON>, <&cmu_disp CLK_ACLK_SMMU_DECON0X>, <&cmu_disp CLK_ACLK_XIU_DECON0X>, <&cmu_disp CLK_PCLK_SMMU_DECON0X>, <&cmu_disp CLK_SCLK_DECON_VCLK>, <&cmu_disp CLK_SCLK_DECON_ECLK>; clock-names = "aclk_decon", "aclk_smmu_decon0x", "aclk_xiu_decon0x", "pclk_smmu_decon0x", "sclk_decon_vclk", "sclk_decon_eclk"; interrupt-names = "vsync", "lcd_sys"; interrupts = <0 202 0>, <0 203 0>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; decon_to_mic: endpoint { remote-endpoint = <&mic_to_decon>; }; }; }; };