device-tree bindings for rockchip soc display controller (vop) VOP (Visual Output Processor) is the Display Controller for the Rockchip series of SoCs which transfers the image data from a video memory buffer to an external LCD interface. Required properties: - compatible: value should be one of the following "rockchip,rk3036-vop"; "rockchip,rk3126-vop"; "rockchip,px30-vop-lit"; "rockchip,px30-vop-big"; "rockchip,rk3066-vop"; "rockchip,rk3188-vop"; "rockchip,rk3288-vop"; "rockchip,rk3368-vop"; "rockchip,rk3366-vop"; "rockchip,rk3399-vop-big"; "rockchip,rk3399-vop-lit"; "rockchip,rk3228-vop"; "rockchip,rk3328-vop"; - interrupts: should contain a list of all VOP IP block interrupts in the order: VSYNC, LCD_SYSTEM. The interrupt specifier format depends on the interrupt controller used. - clocks: must include clock specifiers corresponding to entries in the clock-names property. - clock-names: Must contain aclk_vop: for ddr buffer transfer. hclk_vop: for ahb bus to R/W the phy regs. dclk_vop: pixel clock. - resets: Must contain an entry for each entry in reset-names. See ../reset/reset.txt for details. - reset-names: Must include the following entries: - axi - ahb - dclk - iommus: required a iommu node - port: A port node with endpoint definitions as defined in Documentation/devicetree/bindings/media/video-interfaces.txt. Example: SoC specific DT entry: vopb: vopb@ff930000 { compatible = "rockchip,rk3288-vop"; reg = <0xff930000 0x19c>; interrupts = ; clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>; reset-names = "axi", "ahb", "dclk"; iommus = <&vopb_mmu>; vopb_out: port { #address-cells = <1>; #size-cells = <0>; vopb_out_edp: endpoint@0 { reg = <0>; remote-endpoint=<&edp_in_vopb>; }; vopb_out_hdmi: endpoint@1 { reg = <1>; remote-endpoint=<&hdmi_in_vopb>; }; }; };