Xilinx plb/axi GPIO controller Dual channel GPIO controller with configurable number of pins (from 1 to 32 per channel). Every pin can be configured as input/output/tristate. Both channels share the same global IRQ but local interrupts can be enabled on channel basis. Required properties: - compatible : Should be "xlnx,xps-gpio-1.00.a" - reg : Address and length of the register set for the device - #gpio-cells : Should be two. The first cell is the pin number and the second cell is used to specify optional parameters (currently unused). - gpio-controller : Marks the device node as a GPIO controller. Optional properties: - interrupts : Interrupt mapping for GPIO IRQ. - xlnx,all-inputs : if n-th bit is setup, GPIO-n is input - xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1 - xlnx,gpio-width : gpio width - xlnx,tri-default : if n-th bit is 1, GPIO-n is in tristate mode - xlnx,is-dual : if 1, controller also uses the second channel - xlnx,all-inputs-2 : as above but for the second channel - xlnx,dout-default-2 : as above but the second channel - xlnx,gpio2-width : as above but for the second channel - xlnx,tri-default-2 : as above but for the second channel Example: gpio: gpio@40000000 { #gpio-cells = <2>; compatible = "xlnx,xps-gpio-1.00.a"; gpio-controller ; interrupt-parent = <µblaze_0_intc>; interrupts = < 6 2 >; reg = < 0x40000000 0x10000 >; xlnx,all-inputs = <0x0>; xlnx,all-inputs-2 = <0x0>; xlnx,dout-default = <0x0>; xlnx,dout-default-2 = <0x0>; xlnx,gpio-width = <0x2>; xlnx,gpio2-width = <0x2>; xlnx,interrupt-present = <0x1>; xlnx,is-dual = <0x1>; xlnx,tri-default = <0xffffffff>; xlnx,tri-default-2 = <0xffffffff>; } ;