* ARC-HS Interrupt Distribution Unit This optional 2nd level interrupt controller can be used in SMP configurations for dynamic IRQ routing, load balancing of common/external IRQs towards core intc. Properties: - compatible: "snps,archs-idu-intc" - interrupt-controller: This is an interrupt controller. - #interrupt-cells: Must be <1>. Value of the cell specifies the "common" IRQ from peripheral to IDU. Number N of the particular interrupt line of IDU corresponds to the line N+24 of the core interrupt controller. intc accessed via the special ARC AUX register interface, hence "reg" property is not specified. Example: core_intc: core-interrupt-controller { compatible = "snps,archs-intc"; interrupt-controller; #interrupt-cells = <1>; }; idu_intc: idu-interrupt-controller { compatible = "snps,archs-idu-intc"; interrupt-controller; interrupt-parent = <&core_intc>; #interrupt-cells = <1>; }; some_device: serial@c0fc1000 { interrupt-parent = <&idu_intc>; interrupts = <0>; /* upstream idu IRQ #24 */ };