# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm CAMSS ISP maintainers: - Robert Foss - AngeloGioacchino Del Regno description: | The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms properties: compatible: const: qcom,sdm660-camss clocks: minItems: 42 maxItems: 42 clock-names: items: - const: ahb - const: cphy_csid0 - const: cphy_csid1 - const: cphy_csid2 - const: cphy_csid3 - const: csi0_ahb - const: csi0 - const: csi0_phy - const: csi0_pix - const: csi0_rdi - const: csi1_ahb - const: csi1 - const: csi1_phy - const: csi1_pix - const: csi1_rdi - const: csi2_ahb - const: csi2 - const: csi2_phy - const: csi2_pix - const: csi2_rdi - const: csi3_ahb - const: csi3 - const: csi3_phy - const: csi3_pix - const: csi3_rdi - const: csiphy0_timer - const: csiphy1_timer - const: csiphy2_timer - const: csiphy_ahb2crif - const: csi_vfe0 - const: csi_vfe1 - const: ispif_ahb - const: throttle_axi - const: top_ahb - const: vfe0_ahb - const: vfe0 - const: vfe0_stream - const: vfe1_ahb - const: vfe1 - const: vfe1_stream - const: vfe_ahb - const: vfe_axi interrupts: minItems: 10 maxItems: 10 interrupt-names: items: - const: csid0 - const: csid1 - const: csid2 - const: csid3 - const: csiphy0 - const: csiphy1 - const: csiphy2 - const: ispif - const: vfe0 - const: vfe1 interconnects: maxItems: 1 interconnect-names: items: - const: vfe-mem iommus: maxItems: 4 power-domains: items: - description: VFE0 GDSC - Video Front End, Global Distributed Switch Controller. - description: VFE1 GDSC - Video Front End, Global Distributed Switch Controller. ports: $ref: /schemas/graph.yaml#/properties/ports description: CSI input ports. properties: port@0: $ref: /schemas/graph.yaml#/$defs/port-base unevaluatedProperties: false description: Input port for receiving CSI data. properties: endpoint: $ref: video-interfaces.yaml# unevaluatedProperties: false properties: data-lanes: minItems: 1 maxItems: 4 required: - data-lanes port@1: $ref: /schemas/graph.yaml#/$defs/port-base unevaluatedProperties: false description: Input port for receiving CSI data. properties: endpoint: $ref: video-interfaces.yaml# unevaluatedProperties: false properties: data-lanes: minItems: 1 maxItems: 4 required: - data-lanes port@2: $ref: /schemas/graph.yaml#/$defs/port-base unevaluatedProperties: false description: Input port for receiving CSI data. properties: endpoint: $ref: video-interfaces.yaml# unevaluatedProperties: false properties: data-lanes: minItems: 1 maxItems: 4 required: - data-lanes port@3: $ref: /schemas/graph.yaml#/$defs/port-base unevaluatedProperties: false description: Input port for receiving CSI data. properties: endpoint: $ref: video-interfaces.yaml# unevaluatedProperties: false properties: data-lanes: minItems: 1 maxItems: 4 required: - data-lanes reg: minItems: 14 maxItems: 14 reg-names: items: - const: csi_clk_mux - const: csid0 - const: csid1 - const: csid2 - const: csid3 - const: csiphy0 - const: csiphy0_clk_mux - const: csiphy1 - const: csiphy1_clk_mux - const: csiphy2 - const: csiphy2_clk_mux - const: ispif - const: vfe0 - const: vfe1 vdda-supply: description: Definition of the regulator used as analog power supply. required: - clock-names - clocks - compatible - interrupt-names - interrupts - iommus - power-domains - reg - reg-names - vdda-supply additionalProperties: false examples: - | #include #include #include camss: camss@ca00020 { compatible = "qcom,sdm660-camss"; clocks = <&mmcc CAMSS_AHB_CLK>, <&mmcc CAMSS_CPHY_CSID0_CLK>, <&mmcc CAMSS_CPHY_CSID1_CLK>, <&mmcc CAMSS_CPHY_CSID2_CLK>, <&mmcc CAMSS_CPHY_CSID3_CLK>, <&mmcc CAMSS_CSI0_AHB_CLK>, <&mmcc CAMSS_CSI0_CLK>, <&mmcc CAMSS_CPHY_CSID0_CLK>, <&mmcc CAMSS_CSI0PIX_CLK>, <&mmcc CAMSS_CSI0RDI_CLK>, <&mmcc CAMSS_CSI1_AHB_CLK>, <&mmcc CAMSS_CSI1_CLK>, <&mmcc CAMSS_CPHY_CSID1_CLK>, <&mmcc CAMSS_CSI1PIX_CLK>, <&mmcc CAMSS_CSI1RDI_CLK>, <&mmcc CAMSS_CSI2_AHB_CLK>, <&mmcc CAMSS_CSI2_CLK>, <&mmcc CAMSS_CPHY_CSID2_CLK>, <&mmcc CAMSS_CSI2PIX_CLK>, <&mmcc CAMSS_CSI2RDI_CLK>, <&mmcc CAMSS_CSI3_AHB_CLK>, <&mmcc CAMSS_CSI3_CLK>, <&mmcc CAMSS_CPHY_CSID3_CLK>, <&mmcc CAMSS_CSI3PIX_CLK>, <&mmcc CAMSS_CSI3RDI_CLK>, <&mmcc CAMSS_CSI0PHYTIMER_CLK>, <&mmcc CAMSS_CSI1PHYTIMER_CLK>, <&mmcc CAMSS_CSI2PHYTIMER_CLK>, <&mmcc CSIPHY_AHB2CRIF_CLK>, <&mmcc CAMSS_CSI_VFE0_CLK>, <&mmcc CAMSS_CSI_VFE1_CLK>, <&mmcc CAMSS_ISPIF_AHB_CLK>, <&mmcc THROTTLE_CAMSS_AXI_CLK>, <&mmcc CAMSS_TOP_AHB_CLK>, <&mmcc CAMSS_VFE0_AHB_CLK>, <&mmcc CAMSS_VFE0_CLK>, <&mmcc CAMSS_VFE0_STREAM_CLK>, <&mmcc CAMSS_VFE1_AHB_CLK>, <&mmcc CAMSS_VFE1_CLK>, <&mmcc CAMSS_VFE1_STREAM_CLK>, <&mmcc CAMSS_VFE_VBIF_AHB_CLK>, <&mmcc CAMSS_VFE_VBIF_AXI_CLK>; clock-names = "ahb", "cphy_csid0", "cphy_csid1", "cphy_csid2", "cphy_csid3", "csi0_ahb", "csi0", "csi0_phy", "csi0_pix", "csi0_rdi", "csi1_ahb", "csi1", "csi1_phy", "csi1_pix", "csi1_rdi", "csi2_ahb", "csi2", "csi2_phy", "csi2_pix", "csi2_rdi", "csi3_ahb", "csi3", "csi3_phy", "csi3_pix", "csi3_rdi", "csiphy0_timer", "csiphy1_timer", "csiphy2_timer", "csiphy_ahb2crif", "csi_vfe0", "csi_vfe1", "ispif_ahb", "throttle_axi", "top_ahb", "vfe0_ahb", "vfe0", "vfe0_stream", "vfe1_ahb", "vfe1", "vfe1_stream", "vfe_ahb", "vfe_axi"; interrupts = , , , , , , , , , ; interrupt-names = "csid0", "csid1", "csid2", "csid3", "csiphy0", "csiphy1", "csiphy2", "ispif", "vfe0", "vfe1"; iommus = <&mmss_smmu 0xc00>, <&mmss_smmu 0xc01>, <&mmss_smmu 0xc02>, <&mmss_smmu 0xc03>; power-domains = <&mmcc CAMSS_VFE0_GDSC>, <&mmcc CAMSS_VFE1_GDSC>; reg = <0x0ca00020 0x10>, <0x0ca30000 0x100>, <0x0ca30400 0x100>, <0x0ca30800 0x100>, <0x0ca30c00 0x100>, <0x0c824000 0x1000>, <0x0ca00120 0x4>, <0x0c825000 0x1000>, <0x0ca00124 0x4>, <0x0c826000 0x1000>, <0x0ca00128 0x4>, <0x0ca31000 0x500>, <0x0ca10000 0x1000>, <0x0ca14000 0x1000>; reg-names = "csi_clk_mux", "csid0", "csid1", "csid2", "csid3", "csiphy0", "csiphy0_clk_mux", "csiphy1", "csiphy1_clk_mux", "csiphy2", "csiphy2_clk_mux", "ispif", "vfe0", "vfe1"; vdda-supply = <®_2v8>; ports { #address-cells = <1>; #size-cells = <0>; }; };