* Allwinner PRCM (Power/Reset/Clock Management) Multi-Functional Device PRCM is an MFD device exposing several Power Management related devices (like clks and reset controllers). Required properties: - compatible: "allwinner,sun6i-a31-prcm" or "allwinner,sun8i-a23-prcm" - reg: The PRCM registers range The prcm node may contain several subdevices definitions: - see Documentation/devicetree/clk/sunxi.txt for clock devices - see Documentation/devicetree/reset/allwinner,sunxi-clock-reset.txt for reset controller devices Example: prcm: prcm@01f01400 { compatible = "allwinner,sun6i-a31-prcm"; reg = <0x01f01400 0x200>; /* Put subdevices here */ ar100: ar100_clk { compatible = "allwinner,sun6i-a31-ar100-clk"; #clock-cells = <0>; clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>; }; ahb0: ahb0_clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; clock-div = <1>; clock-mult = <1>; clocks = <&ar100_div>; clock-output-names = "ahb0"; }; apb0: apb0_clk { compatible = "allwinner,sun6i-a31-apb0-clk"; #clock-cells = <0>; clocks = <&ahb0>; clock-output-names = "apb0"; }; apb0_gates: apb0_gates_clk { compatible = "allwinner,sun6i-a31-apb0-gates-clk"; #clock-cells = <1>; clocks = <&apb0>; clock-output-names = "apb0_pio", "apb0_ir", "apb0_timer01", "apb0_p2wi", "apb0_uart", "apb0_1wire", "apb0_i2c"; }; apb0_rst: apb0_rst { compatible = "allwinner,sun6i-a31-clock-reset"; #reset-cells = <1>; }; };